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W681308DG 参数 Datasheet PDF下载

W681308DG图片预览
型号: W681308DG
PDF下载: 下载PDF文件 查看货源
内容描述: W681308 USB音频控制器由新唐集成了高速8051微控制器单元(MCU ) [W681308 USB Audio Controller from Nuvoton integrates fast 8051 Microcontroller Unit (MCU)]
分类和应用: 微控制器
文件页数/大小: 64 页 / 981 K
品牌: NUVOTEM TALEMA [ NUVOTEM TALEMA ]
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W681308  
8.6  
Programming Timers and Counters  
The MCU of W681308 has three 16-bit programmable timers/counters and one programmable Watchdog timer. The  
Watchdog timer is operationally quite different from the other three timers.  
8.6.1  
Timers/Counters 0 and 1  
Timer 0 (TM0) and Timer 1 (TM1) are 16-bit Timer/Counters and are nearly identical. Each of these Timers/Counters has two  
8 bit registers which form the 16 bit counting register. For Timer/Counter 0 they are TH0, the upper 8 bits register, and TL0,  
the lower 8 bit register. Similarly Timer/Counter 1 has two 8 bit registers, TH1 and TL1. The two timers can be configured to  
operate either as timers to count machine cycles or as counters counting external inputs.  
In Timer mode, the timer counts clock cycles. The timer clock can be programmed to be thought of as 1/12 of the system  
clock or 1/4 of the system clock.  
In Counter mode, the register is incremented on the falling edge of the corresponding external input pins, T0 for Timer 0 and  
T1 for Timer 1. The T0 and T1 inputs are sampled in every machine cycle at C4. If the sampled value is high in one machine  
cycle and low in the next, then a valid high to low transition on the pin is recognized and the count register is incremented.  
Since it takes two machine cycles to recognize a negative transition on the pin, the minimum period at which counting will  
take place is double of the machine cycle.  
In either the Timer or Counter mode, the count register will be updated at C3. Therefore, in the Timer mode, the recognized  
negative transition on pin T0 and T1 can cause the count register value to be updated only in the machine cycle following the  
one in which the negative edge was detected.  
The Timer or Counter function is selected by the C/T bit in the TMOD Special Function Register. Each Timer/Counter has  
one selection bit for its own. Bit 2 of TMOD selects the function for Timer/Counter 0 and bit 6 of TMOD selects the function  
for Timer/Counter 1.  
89H  
TMOD  
88H  
Bit 7  
GATE  
Bit 7  
Bit 6  
C/T  
Bit 5  
M1  
Bit 4  
M0  
Bit 3  
GATE  
Bit 3  
IE1  
Bit 2  
C/T  
Bit 2  
IT1  
Bit 1  
M1  
Bit 0  
M0  
Bit 6  
TR1  
Bit 5  
TF0  
Bit 4  
TR0  
Bit 1  
IE0  
Bit 0  
IT0  
TCON  
TF1  
Table 4 Timer Mode/Control TMOD/TCON SFR  
24  
Rev1.2  
 
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