SM59A16U1
8-Bit Micro-controller
64KB with ISP Flash
& 6K+256B RAM embedded
Fig. 9-7: Transmit mode A for Serial 1
Fig. 9-8: Receive mode A for Serial 1
9.8.2 Mode B
This mode is similar to Mode 1 of Serial interface 0. Pin RXD1 serves as input, and TXD1 serves as serial output. No
external shift clock is used. 10 bits are transmitted: a start bit (always 0), 8 data bits (LSB first), and a stop bit (always
1). On receive, a start bit synchronizes the transmission, 8 data bits are available by reading S1BUF, and stop bit sets
the flag RB81 in the SFR S1CON. In mode B, internal baud rate generator is use to specify the baud rate. As shown in
Fig. 9-9 and Fig. 9-10.
Fig. 9-9: Transmit mode B for Serial 1
Fig. 9-10: Receive mode B for Serial 1
Multiprocessor communication of Serial Interface 0 and 1
9.9
The feature of receiving 9 bits in Modes 2 and 3 of Serial Interface 0 or in Mode A of Serial Interface 1 can be used for
multiprocessor communication. In this case, the slave processors have bit SM20 in S0CON or SM21 in S1CON set to
1. When the master processor outputs slave‟s address, it sets the Bit 9 to 1, causing a serial port receive interrupt in
all the slaves. The slave processors compare the received byte with their network address. If matched, the addressed
slave will clear SM20 or SM21 and receive the rest of the message, while other slaves will leave SM20 or SM21 bit
unaffected and ignore this message. After addressing the slave, the host will output the rest of the message with the Bit
Specifications subject to change without notice contact your sales representatives for the most recent information.
ISSFD-M071
Ver A SM59A16U1 04/12/2013
- 68 -
SYNCMOS [ SYNCMOS TECHNOLOGIES,INC ]
