HV461
37 CL-
Current limit amplifier inverting input.
38 CLCOMP
Current limit compensation. An RC network connected between this pin and CL- establishes current limit
reaction time and stability.
39 DIFFAMP+
40 DIFFAMP-
41 DIFFAMPO
42 COMP2
Differential amplifier non-inverting input.
Differential amplifier inverting input.
Differential amplifier output.
The differential amplifier sets gain, establishing output
amplitude and DC offset in conjunction with AMPx and OFFx.
Gain = RFB2/RFB1 (RFB3=RFB1 and RFB4=RFB2, see schematic)
Error amplifier compensation. An RC network connected between these pins establishes loop stability.
COMP1 is the error amp inverting input. COMP2 is the error amp output.
43 COMP1
44 SINEREF
Sine wave reference. Amplitude is 2VP-P nominal. Output impedance is approximately 16kΩ. An external 33nF
capacitor from this pin to ground should be employed to remove high frequency synthesizer ripple. Synthesizer
ripple is at a frequency of 215 · fRING
45 AGND
46 VDCL
Analog ground. Connect to AGND and DGND close to the IC.
Voltage applied to this pin sets the min/max duty cycle limits. If the PWM controller hits these limits, clipping of
the ringer output will occur and the FAULT output will be activated. DMIN=0.4VDCL DMAX=1–0.4VDCL
47 DCREF1
48 DCREF2
In conjunction with the OFFx control inputs, voltages applied to these inputs set the output DC offset.
Output offset is the selected DCREFx voltage multiplied by gain. See also OFF0 & OFF1 (pins 17 & 18)
10/3/03
1235 Bordeaux Drive, Sunnyvale, CA 94809
TEL: (408) 222-8888 / FAX: (408) 222-4895
www.supertex.com
13
2003 Supertex Inc. All rights reserved. Unauthorized use or reproduction prohibited.
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