SMM764
Preliminary Information
APPLICATIONS INFORMATION (CONTINUED)
LINKED OPERATION
If the SMM764 is programmed to wait for VDD, 12VIN,
or Internal Temp to be valid (above UV1 and below
OV1) before power-on sequencing may commence,
then this condition will be checked after the restart
timer has expired and the PWR_ON pin has been
released.
The SMM764 can be linked to multiple Sequence-
Link devices to create a seamless multi-channel
power manager. With linked operation 8 Sequence-
Link devices in a system can sequence up to 46
supplies within 29 sequence positions.
The
The conditions that may lead to a Fault-Triggered
restart include any channel exceeding its user
programmable thresholds (OV or UV), set to trigger
either a force-shutdown or a power-off sequence. In
addition, in the event that the sequence termination
timer times out before a channel reaches its UV1 or
OFF threshold, during sequencing, a Fault-Triggered
restart occur.
sequencing in this mode can be interlaced, sequencing
a supply from device A, then from device B, then again
from device A, etc. This extended sequencing is made
possible by the inclusion of a SEQ_LINK pin.
For this mode of operation, the control pins, including
SEQ_LINK, PWR_ON, and FS# on each device must
be tied together. In addition, the VDD and 12V supply
must also be connected on all linked devices. As a
consequence when multiple devices are linked
together, all devices must be powered by the same
supply.
I2C POWER OFF CONTROL
Power-on sequencing is only permitted while the
PWR_ON pin is active. Once the PWR_ON pin is
active and the SMM764 has entered monitoring mode,
an I2C command may be issued to commence the
power-off sequence. This condition will continue until
an I2C “power on” command is issued.
RESTART
There are two possible conditions in which a restart
sequence may be initiated. The first instance occurs
when either the FS# pin is asserted or the PWR_ON
pin is pulled low thus initiating a command-triggered
restart. The second condition occurs when a user
PROGRAMMABLE RETRIES
In the event of a persistent system fault, the SMM764
may be programmed to limit the number of Fault-
Triggered restarts it will allow. This programmable
setting ensures that the SMM764 will not enter a
hiccup-mode of operation, while still reducing
susceptibility to transient fault conditions.
In the event of a Fault-Triggered restart the fault will
be registered and internally compared to the maximum
number of allowable faults. If this number is exceeded
then the fault condition will be latched and the
PWR_ON and FS# pins will be pulled low while the
RST# output is asserted. This fault condition will
remain latched until power is cycled on the SMM764,
at which point the PWR_ON and FS# pins will be
released, the number of faults will be reset zero, and
the restart sequence will begin. The allowable
programmable setting include one, three, and
unlimited retries.
programmable fault triggers
a
force-shutdown
operation or a power-off sequence thus resulting in a
fault-triggered restart.
In either case, the SMM764 will wait until all voltages
have fallen below their user programmable OFF
thresholds, after all channels are off, the PWR_ON pin
will continue to be held low for a period of time
dependent on the nature of the fault.
When a power-off or force-shutdown condition results
from
a
command-triggered power-off or force-
shutdown, the SMM764 will automatically begin the
restart procedure. When restart begins an internal
timer will begin to timeout for a command-triggered
Restart Delay (tCTRD) of 12.5 ms. After this time has
expired the PWR_ON pin is released, allowing the
power-on sequence to begin.
When a power-off or force-shutdown condition results
from a fault-triggered power-off or force-shutdown, the
SMM764 may or may not begin the restart procedure
(see PROGRAMMABLE RETRIES), if restart begins
the internal timer will begin to timeout a fault-triggered
Restart Delay (tFTRD) of 2.4 s before the PWR_ON pin
is released allowing the power-on Sequence to begin.
Summit Microelectronics, Inc
2098 1.1 6/29/2005
18
SUMMIT [ SUMMIT MICROELECTRONICS, INC. ]
