SMM764
Preliminary Information
APPLICATIONS INFORMATION (CONTINUED)
A pulse of current either sourced or sunk for 5µs every
1.7ms, to the capacitors connected to the TRIM_CAPX
pins adjusts the voltage output on the TRIMX pins.
The voltages on the TRIM_CAPX pins are buffered
On the rising edge of the PWR_ON pin the SMM764
will wait a power-on delay time (tDPON) for any
channels in the first sequence position (position 1) and
then activate the PUPX outputs for those channels.
The power-on delay times are individually
programmable for each channel. The SMM764 will
then wait until all VMX inputs of the channels assigned
to the first sequence position are above their user
programmable UV1 thresholds, which is called
cascade sequencing.
At this point, the SMM764 will enter the second
sequence position (position 2) and begin to timeout
the power-on delay times for the associated channels.
This process continues until all of the channels
assigned to participate in the sequence have turned
on and are above their UV1 threshold. Once the
sequence has completed the status register indicates
that all sequenced power supply channels have turned
on. After the sequence has completed the SMM764
will begin the ADOC of the enabled channels. The
power-on sequencing mode ends when the ADOC
channels are at their nominal voltage setting. The
“Ready” bit in the status register signifies that the
voltages are at their set points.
The programmable sequence termination timer can be
used to protect against a stalled power-on sequence.
This timer resets itself at the beginning of each
sequence position. All channels in the sequence
position must go above their UV1 threshold before the
sequence termination timer times out (tSTT) or the
sequence will terminate by pulling the FS# pin low,
initiating a Force Shutdown. The status register
contains bits indicating in which sequence position the
timer timed out. This sequence termination timer has
four settings of OFF, 100ms, 200ms and 400ms.
While the SMM764 is in the power-on sequencing
mode the RST# output is held active and the
HEALTHY output is held inactive regardless of trigger
sources (Figure 8). The power-off and force-shutdown
trigger options are also disabled while in this mode.
Furthermore, the SMM764 will not respond to activity
on the PWR_ON pin or to a power-off I2C command
during power-on sequencing mode.
and applied to the TRIMX pins.
The voltage
adjustments on the TRIMX pins cause a slight ripple of
less than 1mV on the power supply voltages. The
amplitude of this ripple is a function of the TRIM_CAPX
capacitor and the trim gain of the converter.
Application Note 37 details the calculation of the
TRIM_CAPX capacitor to achieve a desired minimum
ripple.
Each channel can be programmed to either enable or
disable the ADOC function. When disabled or not
active, the TRIMX pins on the SMM764 are high
impedance inputs. If disabled and not used, they can
be connected to ground. The voltages on the TRIMX
pins are buffered and applied to the TRIM_CAPX pins
charging the capacitors.
This allows a smooth
transition from the converter powering up to its
nominal voltage, to the SMM764 controlling that
voltage, and to the ADOC nominal setting.
The pulse of current can be increased to a 10X pulse
of current until the power supply voltages are at their
nominal settings by selecting the programmable Fast
Margin option. As the name implies, this option
decreases the time required to bring a supply voltage
from the converter’s nominal output voltage to the
ADOC nominal, high, or low voltage setting.
POWER-ON CASCADE SEQUENCING
The SMM764 can be programmed to sequence on 32
supplies occupying up to 29 sequence positions. This
is accomplished using the SEQ_LINK pin. Each of the
4 channels (A-D) on a SMM764 has an associated
open drain PUP output that, when connected to a
converter’s enable pin, controls the turn-on of the
converter. The channels are assigned sequence
positions to determine the order of the sequence. The
polarity of each of the PUPX outputs is programmable
for use with various types of converters.
Power-on sequencing is initiated on the rising edge of
the PWR_ON pin.
The SMM764 can be programmed to wait until any or
all VDD, 12VIN, and Internal Temp (Internal
Temperature) ADC readings are within their respective
voltage threshold or temperature limits before power-
on sequencing is allowed to begin. This ensures that
the converters have reached their full supply voltage
before they are enabled.
The SMM764 permits multiple supplies to occupy the
same sequence position. When a sequence position is
shared, each channel will be enabled after its
respective power-on delay. When the last channel
occupying a shared sequence position exceeds its
UV1 setting the SMM764 will increment to the next
Summit Microelectronics, Inc
2098 1.1 6/29/2005
15
SUMMIT [ SUMMIT MICROELECTRONICS, INC. ]
