SMM764
Preliminary Information
APPLICATIONS INFORMATION (CONTINUED)
each channel that decode the commands to margin
high, margin low, or control to the nominal setting.
Therefore, any combination of margin high, margin
low, and nominal control is allowed in the margining
mode.
The status register reveals that all sequenced
channels have turned off. The power-off sequencing
mode ends when all sequenced supplies are below
their OFF thresholds.
The programmable sequence termination timer can be
used to protect against a stalled power-off sequence.
This timer resets itself at the beginning of each
sequence position. All channels in the sequence
position must go below their OFF threshold before the
sequence termination timer times out (tSTT) or the
sequence will terminate and all PUP outputs will be
switched to their inactive state. This timer has four
settings of OFF: 100ms, 200ms and 400ms. The
sequence termination timer can be disabled separately
for power-off sequencing.
While the SMM764 is in the power-off sequencing
mode, the RST# output is held active and the
HEALTHY output is held inactive, regardless of trigger
sources (Figure 8). The force-shutdown trigger option
is also disabled while in this mode. Furthermore, the
SMM764 will not respond to activity on the PWR_ON
pin during power-off sequencing mode.
Once the SMM764 receives the command to margin
the supply voltages, it begins adjusting the supply
voltages to move toward the desired setting. When all
channels are at their voltage setting, a bit is set in the
margin status registers.
Note: Configuration writes or reads of registers 00HEX
to 0FHEX should not be performed while the SMM764 is
margining.
POWER-OFF CASCADE SEQUENCING
The SMM764 performs power-off sequencing in the
reverse order of power-on sequencing.
Power-off cascade sequencing can be initiated by the
PWR_ON pin, via I2C control or triggered by a fault
condition on any of the monitored inputs. Toggling the
PWR_ON pin low will initiate the power-off sequence.
To enable software control of the power-off
sequencing feature, the SMM764 offers an I2C
command to initiate power-off sequencing while the
PWR_ON pin is asserted. Furthermore, power-off
sequencing can be initiated by a fault condition on a
monitored input.
FORCE SHUTDOWN
The force-shutdown operation brings all PUPX outputs
to their inactive state. This operation is used for an
emergency shutdown when there is not enough time
to sequence the supplies off. The force-shutdown
operation shuts off all sequenced channels pulls the
PWR_ON pin low, and waits for the supply voltages to
drop below their respective OFF thresholds before
beginning a restart sequence.
A force-shutdown operation can be initiated by any
one of four events. The first two methods for initiating
a force-shutdown are always enabled. Simply taking
the FS# pin low will initiate a force-shutdown operation
and maintain it until the pin is brought high again. An
I2C force-shutdown command allows the force-
shutdown operation to be initiated via software control.
This bit is cleared after all sequenced channels have
dropped below their OFF voltage threshold.
Once power-off sequencing begins, the SMM764 will
wait a power-off delay time (tDPOFF) for any channel in
the last sequence position and then deactivate the
PUP outputs for those channels. The power-off delay
times are individually programmable for each channel.
The
SMM764
will
then
wait
until
all
VMX inputs of the channels assigned to that sequence
position are below the programmed OFF thresholds.
At this point, the SMM764 will move to the next
sequence position and begin to timeout the power-off
delay times for the associated channels. This process
continues until all of the channels in the sequence
have turned off and are below their OFF thresholds.
Summit Microelectronics, Inc
2098 1.1 6/29/2005
17
SUMMIT [ SUMMIT MICROELECTRONICS, INC. ]
