SMM665B
Preliminary Information
I2C PROGRAMMING INFORMATION (CONTINUED)
S
T
A
S
T
R
T
O
P
Memory Address
Master
Slave
Bus Address
Data
S
A
0
0
A
C
7
C
6
C
5
C
4
C
3
C
2
C
1
C
0
D
7
D
6
D
5
D
D
3
D
2
D
D
0
1
0
1
0
/
W
2
4
1
1
A
C
K
A
C
K
A
C
K
Figure 22 – General Purpose Memory Byte Write
S
T
A
R
T
Memory Address
Bus Address
Master
Data (1)
S
A
0
0
/
A
2
C
7
C
6
C
5
C
4
C
3
C
2
C
1
C
0
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
1
0
1
0
W
1
Slave
A
C
K
A
C
K
A
C
K
S
T
O
P
Master
Slave
Data (2)
Data (16)
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
D
7
D
6
D
5
D
2
D
1
D
0
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
A
C
K
A
C
K
A
C
K
Figure 23 - General Purpose Memory Page Write
S
T
S
T
A
A
R
T
R
T
Memory Address
Master
Bus Address
Bus Address
S
A
0
0
S
A
0
0
A
C
7
C
6
C
5
C
4
C
3
C
2
C
1
C
0
A
1
0
1
0
/
W
1
0
1
0
/
R
2
2
1
1
Slave
A
C
K
A
C
K
A
C
K
N
A
C
K
S
T
A
C
K
A
C
K
O
P
Master
Slave
Data (1)
Data (n)
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
D
7
D
6
D
5
D
2
D
1
D
0
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
Figure 24 - General Purpose Memory Read
Summit Microelectronics, Inc
2089 1.1 10/20/04
26
SUMMIT [ SUMMIT MICROELECTRONICS, INC. ]
