SMM665B
Preliminary Information
I2C PROGRAMMING INFORMATION (CONTINUED)
S
T
S
T
A
A
R
T
Configuration
R
Master
Slave
Bus Address
Bus Address
Register Address
T
S
A
0
S
A
0
A
C
7
C
6
C
5
C
4
C
3
C
2
C
1
C
0
A
2
1
0
1
1
1
W
1
0
1
1
1
R
2
A
C
K
A
C
K
A
C
K
N
A
C
K
S
T
A
C
K
A
C
K
O
P
Master
Slave
Data (1)
Data (n)
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
D
7
D
6
D
5
D
2
D
1
D
0
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
Figure 19 - Configuration Register Read
S
T
S
T
A
R
T
Configuration
Register Address
O
P
Master
Slave
Bus Address
Data
A
2
A
1
A
0
C
7
C
6
C
5
C
4
C
3
C
2
C
1
C
0
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
1
0
0
1
W
A
C
K
A
C
K
A
C
K
Figure 20 - Configuration Register with Slave Address 1001BIN Write
S
S
T
T
A
R
T
A
R
T
Configuration
Master
Slave
Bus Address
Bus Address
Register Address
A
2
A
1
A
0
C
7
C
6
C
5
C
4
C
3
C
2
C
1
C
0
A
2
A
1
A
0
1
0
0
1
W
1
0
0
1
R
A
C
K
A
C
K
A
C
K
N
A
C
K
S
T
A
C
K
A
C
K
O
P
Master
Slave
Data (1)
Data (n)
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
D
7
D
6
D
5
D
2
D
1
D
0
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
Figure 21 - Configuration Register with Slave Address 1001BIN Read
Summit Microelectronics, Inc
2089 1.1 10/20/04
25
SUMMIT [ SUMMIT MICROELECTRONICS, INC. ]
