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SMD1103 参数 Datasheet PDF下载

SMD1103图片预览
型号: SMD1103
PDF下载: 下载PDF文件 查看货源
内容描述: 10位数据采集系统的自主环境监测 [10-Bit Data Acquisition System for Autonomous Environmental Monitoring]
分类和应用: 监控
文件页数/大小: 14 页 / 499 K
品牌: SUMMIT [ SUMMIT MICROELECTRONICS, INC. ]
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SMD1102 / 1103 / 1113  
Start and Stop Conditions  
Acknowledge  
BothDataandClocklinesremainhighwhenthebusisnot Data is always transferred in 8-Bit bytes. Acknowledge  
busy. Datatransferbetweendevicesmaybeinitiatedwith (ACK) is used to indicate a successful data transfer. The  
aStartconditiononlywhenSCLandSDAarehigh. Ahigh- Transmitting device will release the bus after transmitting  
to-lowtransitionoftheDatalinewhiletheClocklineishigh eight bits. During the ninth clock cycle the Receiver will  
is defined as a Start condition. A low-to-high transition of pull the SDA line low to Acknowledge that it received the  
theDatalinewhiletheClocklineishighisdefinedasaStop eight bits of data (See Figure 13). The termination of a  
condition. See Figure 12.  
Master Read sequence is indicated by a non-Acknowl-  
edge (NACK), where the Master will leave the Data line  
high.  
START  
Condition  
STOP  
Condition  
SCL  
In the case of a Read from a Summit part, when the last  
byte has been transferred to the Master, the Master will  
leave the Data line high for a NACK. This will cause the  
Summitparttostopsendingdata,andtheMasterwillissue  
a Stop on the clock pulse following the NACK.  
SDA In  
2033 Fig10  
InthecaseofaWritetoaSummitparttheMasterwillsend  
aStopontheclockpulseafterthelastAcknowledge. This  
will indicate to the Summit part that it should begin its  
internal nonvolatile write cycle.  
Figure 12. Start and Stop Conditions  
3
9
1
2
8
SCL  
Read and Write  
SDA  
ThefirstbytefromaMasterisalwaysmadeupoftheeight  
bits illustrated in Table 1.  
Trans  
SDA  
Rec  
ACK  
InthereadmodetheSMD1102/1103/1113transmitseight  
bits of data, then releases the SDA line, and monitors the  
line for an Acknowledge signal. If an Acknowledge is  
detected, and no STOP condition is generated by the  
Master, the device will continue to transmit data. If an  
Acknowledge is not detected (NACK), the device will  
terminate further data transmission.  
2033 Fig11  
Figure 13. Acknowledge Timing  
Protocol  
The protocol defines any device that sends data onto the  
busasaTransmitter,andanydevicethatreceivesdataas  
a Receiver. The device controlling data transmission is  
called the Master, and the controlled device is called the  
Slave. In all cases the Summit Microelectronic devices  
are slave devices, since they never initiate any data  
transfers.  
InthewritemodetheSMD1102/1103/1113receiveseight  
bitsofdata, thengeneratesanAcknowledgesignal. Itwill  
continue to generate ACKs until a STOP condition is  
generated by the Master.  
SUMMIT MICROELECTRONICS, Inc.  
2033 8.1 10/04/01  
11