Pinout and pin description
STM8S903K3 STM8S903F3
Figure 6: STM8S903K3 SDIP32 pinout
AIN4/TIM5_CH2/ADC_ETR/PD3(HS)
1
32
31
30
29
28
27
26
25
24
23
22
PD2(HS)[AIN3][TIM5_CH3]
TIM5_CH1[UART1_CK]BEEP/PD4(HS)
AIN5/UART1_TX/PD5(HS)
AIN6/UART1_RX/PD6(HS)
[TIM1_CH4]TLI/PD7(HS)
NRST
2
PD1(HS)/SWIM
3
PD0(HS)/TIM1_BKIN[CLK_CCO]
PC7(HS)/SPI_MISO[TIM1_CH2]
PC6(HS)/SPI_MOSI[TIM1_CH1]
PC5(HS)/SPI_SCK[TIM5_CH1]
4
5
6
OSCIN/PA1
7
PC4(HS)/TIM1_CH4/CLK_CCO[AIN2][TIM1_CH2N]
PC3(HS)/TIM1_CH3[TLI][TIM1_CH1N]
PC2(HS)/TIM1_CH2[TIM1_CH3N]
PC1(HS)/TIM1_CH1/UART1_CK[TIM1_CH2N]
PE5/SPI_NSS[TIM1_CH1N]
OSCOUT/PA2
8
V
9
SS
VCAP
10
11
12
13
14
15
V
DD
[UART1_TX][SPI_NSS]/TIM5_CH3/PA3(HS)
21 PB0(HS)/AIN0/TIM1_CH1N
20 PB1(HS)/AIN1/TIM1_CH2N
19 PB2(HS)/AIN2/TIM1_CH3N
[UART1_RX]/PF4
PB7
PB6
18
PB3(HS)[AIN3]TIM1_ETR
[TIM1_BKIN]I2C_SDA/PB5(T) 16
17 PB4(T)/I2C_SCL[ADC_ETR]
1. (HS) high sink capability.
2. (T) true open drain (P-buffer and protection diode to VDD not implemented).
3. [ ] alternate function remapping option (if the same alternate function is shown twice, it
indicates an exclusive choice not a duplication of the function).
5.5
Pin description
Table 6: UFQFPN32/LQFP32/SDIP32 pin description
Input
Output
Main
Default alternate function Alternate function after remap
[option bit]
SDIP
32
UFQFPN/ Pin name
LQFP32
Type
function
(after
reset)
floating
wpu Ext.
interrupt
High
Speed OD
PP
(1)
sink
6
7
1
2
NRST
I/O
I/O
X
Reset
(2)
PA1/ OSCIN
X
X
X
X
X
O1
O1
X
X
X
X
Port
A1
Resonator/ crystal in
Resonator/ crystal out
8
3
PA2/ OSCOUT
I/O
X
Port
A2
9
4
5
6
7
V
S
Digital ground
SS
10
11
12
VCAP
S
1.8 V regulator capacitor
Digital power supply
V
S
DD
PA3/ TIM5_CH3 [SPI_NSS]
[UART1_TX]
I/O
X
X
X
X
HS
O3
X
X
Port
A3
Timer 52 channel 3
SPI master/ slave select
[AFR1]/ UART1 data transmit
[AFR1:0]
13
14
8
9
PF4 [UART1_RX]
PB7
I/O
I/O
X
X
X
X
O1
O1
X
X
X
X
Port
F4
UART1 data receive [AFR1:0]
Port
B7
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DocID15590 Rev 8
STMICROELECTRONICS [ ST ]
