Product overview
Transmission error detection with interrupt generation
STM8S903K3 STM8S903F3
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Parity control
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Synchronous communication
Full duplex synchronous transfers
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SPI master operation
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8-bit data communication
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Maximum speed: 1 Mbit/s at 16 MHz (fCPU/16)
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LIN master mode
Emission: Generates 13-bit synch break frame
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Reception: Detects 11-bit break frame
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4.14.2
SPI
Maximum speed: 8 Mbit/s (fMASTER/2) both for master and slave
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Full duplex synchronous transfers
Simplex synchronous transfers on two lines with a possible bidirectional data line
Master or slave operation - selectable by hardware or software
CRC calculation
1 byte Tx and Rx buffer
Slave/master selection input pin
4.14.3
I²C
I²C master features:
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Clock generation
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Start and stop generation
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I²C slave features:
Programmable I2C address detection
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Stop bit detection
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Generation and detection of 7-bit/10-bit addressing and general call
Supports different communication speeds:
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Standard speed (up to 100 kHz)
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Fast speed (up to 400 kHz)
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DocID15590 Rev 8
STMICROELECTRONICS [ ST ]
