STM8S003K3 STM8S003F3
Memory and register map
Address
Block
Register label
Register name
Reset
status
0x00 5342
0x00 5343
0x00 5344
0x00 5345
0x00 5346
0x00 5347
0x00 5348
Reserved
TIM4_IER
TIM4_SR
TIM4 interrupt enable register
TIM4 status register
0x00
0x00
0x00
0x00
0x00
0xFF
TIM4_EGR
TIM4_CNTR
TIM4_PSCR
TIM4_ARR
TIM4 event generation register
TIM4 counter
TIM4 prescaler register
TIM4 auto-reload register
0x00 5349 to
0x00 53DF
Reserved area (153 bytes)
0x00 53E0 to
0x00 53F3
ADC1
ADC _DBxR
ADC data buffer registers
0x00
0x00 53F4 to
0x00 53FF
Reserved area (12 bytes)
0x00 5400
0x00 5401
0x00 5402
0x00 5403
0x00 5404
0x00 5405
0x00 5406
0x00 5407
ADC1
ADC _CSR
ADC_CR1
ADC_CR2
ADC_CR3
ADC_DRH
ADC_DRL
ADC_TDRH
ADC_TDRL
ADC control/status register
ADC configuration register 1
ADC configuration register 2
ADC configuration register 3
ADC data register high
0x00
0x00
0x00
0x00
0xXX
0xXX
ADC data register low
ADC Schmitt trigger disable register high 0x00
ADC Schmitt trigger disable register low 0x00
DocID018576 Rev 2
35/99
STMICROELECTRONICS [ ST ]
