STM8S003K3 STM8S003F3
Memory and register map
Address
Block
Register label
Register name
Reset
status
0x00 521C
0x00 521D
0x00 521E
I2C_CCRH
I2C_TRISER
I2C_PECR
I2C Clock control register high
I2C TRISE register
0x00
0x02
0x00
I2C packet error checking register
0x00 521F to
0x00 522F
Reserved area (17 bytes)
0x00 5230
0x00 5231
0x00 5232
0x00 5233
0x00 5234
0x00 5235
0x00 5236
0x00 5237
0x00 5238
0x00 5239
0x00 523A
UART1
UART1_SR
UART1 status register
0xC0
0xXX
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
UART1_DR
UART1 data register
UART1_BRR1
UART1_BRR2
UART1_CR1
UART1_CR2
UART1_CR3
UART1_CR4
UART1_CR5
UART1_GTR
UART1_PSCR
UART1 baud rate register 1
UART1 baud rate register 2
UART1 control register 1
UART1 control register 2
UART1 control register 3
UART1 control register 4
UART1 control register 5
UART1 guard time register
UART1 prescaler register
0x00 523B to
0x00 523F
Reserved area (21 bytes)
0x00 5250
0x00 5251
TIM1
TIM1_CR1
TIM1_CR2
TIM1 control register 1
TIM1 control register 2
0x00
0x00
DocID018576 Rev 2
31/99
STMICROELECTRONICS [ ST ]
