Electrical characteristics
STM32F103xC, STM32F103xD, STM32F103xE
5.3.18
12-bit ADC characteristics
Unless otherwise specified, the parameters given in
are derived from tests
performed under ambient temperature, f
PCLK2
frequency and V
DDA
supply voltage
conditions summarized in
Note:
Table 58.
Symbol
V
DDA
V
REF+
I
VREF
f
ADC
f
S(2)
f
TRIG(2)
V
AIN
R
AIN(2)
R
ADC(2)
C
ADC(2)
t
CAL(2)
t
lat(2)
t
latr(2)
t
S(2)
t
STAB(2)
t
CONV(2)
It is recommended to perform a calibration after each power-up.
ADC characteristics
Parameter
Power supply
Positive reference voltage
Current on the V
REF
input
pin
ADC clock frequency
Sampling rate
External trigger frequency
Conversion voltage range
(3)
External input impedance
Sampling switch resistance
Internal sample and hold
capacitor
Calibration time
Injection trigger conversion
latency
Regular trigger conversion
latency
Sampling time
Power-up time
Total conversion time
(including sampling time)
f
ADC
= 14 MHz
f
ADC
= 14 MHz
5.9
83
f
ADC
= 14 MHz
0.214
3
(4)
f
ADC
= 14 MHz
0.143
2
(4)
f
ADC
= 14 MHz
0.107
1.5
0
1
0
17.1
239.5
1
18
See
Equation 1
and
for details
f
ADC
= 14 MHz
0.6
0.05
Conditions
Min
2.4
2.4
160
(1)
Typ
Max
3.6
V
DDA
220
(1)
14
1
823
17
0 (V
SSA
or V
REF-
tied to ground)
V
REF+
50
1
8
Unit
V
V
µA
MHz
MHz
kHz
1/f
ADC
V
k
k
pF
µs
1/f
ADC
µs
1/f
ADC
µs
1/f
ADC
µs
1/f
ADC
µs
µs
1/f
ADC
14 to 252 (t
S
for sampling +12.5 for
successive approximation)
1. Based on characterization results, not tested in production.
2. Guaranteed by design, not tested in production.
3. V
REF+
can be internally connected to V
DDA
and V
REF-
can be internally connected to V
SSA
, depending on the package.
Refer to
for further details.
4. For external triggers, a delay of 1/f
PCLK2
must be added to the latency specified in
98/123
Doc ID 14611 Rev 7
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