STM32F103x8, STM32F103xB
Table 59. Document revision history (continued)
Revision history
Date
Revision
Changes
Figure 2: Clock tree on page 12 added.
Maximum TJ value given in Table 8: Thermal characteristics on
page 36.
CRC feature added (see CRC (cyclic redundancy check) calculation
unit on page 9 and Figure 10: Memory map on page 32 for address).
IDD modified in Table 16: Typical and maximum current consumptions in
Stop and Standby modes.
ACCHSI modified in Table 24: HSI oscillator characteristics on page 53,
note 2 removed.
PD, TA and TJ added, tprog values modified and tprog description clarified
in Table 28: Flash memory characteristics on page 54.
tRET modified in Table 29: Flash memory endurance and data retention.
14-Mar-2008
5
VNF(NRST) unit corrected in Table 37: NRST pin characteristics on
page 63.
Table 41: SPI characteristics on page 67 modified.
IVREF added to Table 45: ADC characteristics on page 71.
Table 47: ADC accuracy - limited test conditions added. Table 48: ADC
accuracy modified.
LQFP100 package specifications updated (see Section 6: Package
characteristics on page 76).
Recommended LQFP100, LQFP 64, LQFP48 and VFQFPN36
footprints added (see Figure 47, Figure 49, Figure 53 and Figure 41).
Section 6.2: Thermal characteristics on page 86 modified,
Section 6.2.1 and Section 6.2.2 added.
Appendix A: Important notes on page 81 removed.
Small text changes. Figure 10: Memory map clarified.
In Table 29: Flash memory endurance and data retention:
– NEND tested over the whole temperature range
– cycling conditions specified for tRET
21-Mar-2008
6
– tRET min modified at TA = 55 °C
V25, Avg_Slope and TL modified in Table 49: TS characteristics.
CRC feature removed.
CRC feature added back. Small text changes. Section 1: Introduction
modified. Section 2.2: Full compatibility throughout the family added.
IDD at TA max = 105 °C added to Table 16: Typical and maximum
current consumptions in Stop and Standby modes on page 43.
IDD_VBAT removed from Table 21: Typical current consumption in
Standby mode on page 47.
Values added to Table 40: SCL frequency (fPCLK1= 36 MHz.,VDD = 3.3
V) on page 66.
22-May-2008
7
Figure 32: SPI timing diagram - slave mode and CPHA = 0 on page 68
modified. Equation 1 corrected.
tRET at TA = 105 °C modified in Table 29: Flash memory endurance and
data retention on page 55.
VUSB added to Table 43: USB DC electrical characteristics on page 70.
Figure 54: LQFP100 PD max vs. TA on page 88 modified.
Axx option added to Table 58: Ordering information scheme on
page 89.
Doc ID 13587 Rev 12
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