STM32F103x8, STM32F103xB
Table 59. Document revision history (continued)
Revision history
Date
Revision
Changes
STM32F103CBT6, STM32F103T6 and STM32F103T8 root part
numbers added (see Table 2: STM32F103xx medium-density device
features and peripheral counts)
VFQFPN36 package added (see Section 6: Package characteristics).
All packages are ECOPACK® compliant. Package mechanical data
inch values are calculated from mm and rounded to 4 decimal digits
(see Section 6: Package characteristics).
Table 5: Medium-density STM32F103xx pin definitions updated and
clarified.
Table 26: Low-power mode wakeup timings updated.
TA min corrected in Table 12: Embedded internal reference voltage.
Note 2 added below Table 22: HSE 4-16 MHz oscillator characteristics.
VESD(CDM) value added to Table 32: ESD absolute maximum ratings.
Note 3 added and VOH parameter description modified in Table 35:
Output voltage characteristics.
Note 1 modified under Table 36: I/O AC characteristics.
Equation 1 and Table 46: RAIN max for fADC = 14 MHz added to
Section 5.3.17: 12-bit ADC characteristics.
VAIN, tS max, tCONV, VREF+ min and tlat max modified, notes modified
and tlatr added in Table 45: ADC characteristics.
Figure 36: ADC accuracy characteristics updated. Note 1 modified
below Figure 37: Typical connection diagram using the ADC.
Electrostatic discharge (ESD) on page 57 modified.
Number of TIM4 channels modified in Figure 1: STM32F103xx
performance line block diagram.
Maximum current consumption Table 13, Table 14 and Table 15
updated. Vhysmodified in Table 34: I/O static characteristics.
Table 48: ADC accuracy updated. tVDD modified in Table 10: Operating
conditions at power-up / power-down. VFESD value added in Table 30:
EMS characteristics.
18-Oct-2007
3
Values corrected, note 2 modified and note 3 removed in Table 26:
Low-power mode wakeup timings.
Table 16: Typical and maximum current consumptions in Stop and
Standby modes: Typical values added for VDD/VBAT = 2.4 V, Note 2
modified, Note 2 added.
Table 21: Typical current consumption in Standby mode added. On-chip
peripheral current consumption on page 48 added.
ACCHSI values updated in Table 24: HSI oscillator characteristics.
Vprog added to Table 28: Flash memory characteristics.
Upper option byte address modified in Figure 10: Memory map.
Typical fLSI value added in Table 25: LSI oscillator characteristics and
internal RC value corrected from 32 to 40 kHz in entire document.
TS_temp added to Table 49: TS characteristics. NEND modified in
Table 29: Flash memory endurance and data retention.
TS_vrefint added to Table 12: Embedded internal reference voltage.
Handling of unused pins specified in General input/output
characteristics on page 58. All I/Os are CMOS and TTL compliant.
Figure 38: Power supply and reference decoupling (VREF+ not
connected to VDDA) modified.
tJITTER and fVCO removed from Table 27: PLL characteristics.
Appendix A: Important notes on page 81 added.
Added Figure 15, Figure 16, Figure 18 and Figure 20.
Doc ID 13587 Rev 12
91/96