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STM32F103CBT7TR 参数 Datasheet PDF下载

STM32F103CBT7TR图片预览
型号: STM32F103CBT7TR
PDF下载: 下载PDF文件 查看货源
内容描述: 中密度高性能线的基于ARM的32位MCU,具有64或128 KB的闪存, USB , CAN ,7个定时器, 2的ADC ,9个通信接口 [Medium-density performance line ARM-based 32-bit MCU with 64 or 128 KB Flash, USB, CAN, 7 timers, 2 ADCs, 9 communication interfaces]
分类和应用: 闪存通信
文件页数/大小: 96 页 / 1430 K
品牌: STMICROELECTRONICS [ ST ]
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Electrical characteristics  
STM32F103x8, STM32F103xB  
Input/output AC characteristics  
The definition and values of input/output AC characteristics are given in Figure 29 and  
Table 36, respectively.  
Unless otherwise specified, the parameters given in Table 36 are derived from tests  
performed under the ambient temperature and V supply voltage conditions summarized  
DD  
in Table 9.  
(1)  
Table 36. I/O AC characteristics  
MODEx[1:0]  
Symbol  
Parameter  
Conditions  
Min Max Unit  
bit value(1)  
fmax(IO)out Maximum frequency(2) CL = 50 pF, VDD = 2 V to 3.6 V  
2
MHz  
ns  
Output high to low  
tf(IO)out  
125(3)  
10  
level fall time  
CL = 50 pF, VDD = 2 V to 3.6 V  
Output low to high  
tr(IO)out  
125(3)  
10  
level rise time  
fmax(IO)out Maximum frequency(2) CL = 50 pF, VDD = 2 V to 3.6 V  
MHz  
ns  
Output high to low  
tf(IO)out  
25(3)  
01  
level fall time  
CL = 50 pF, VDD = 2 V to 3.6 V  
Output low to high  
tr(IO)out  
25(3)  
level rise time  
CL = 30 pF, VDD = 2.7 V to 3.6 V  
Fmax(IO)out Maximum frequency(2) CL = 50 pF, VDD = 2.7 V to 3.6 V  
CL = 50 pF, VDD = 2 V to 2.7 V  
50  
30  
MHz  
MHz  
MHz  
20  
CL = 30 pF, VDD = 2.7 V to 3.6 V  
Output high to low  
level fall time  
5(3)  
8(3)  
12(3)  
5(3)  
8(3)  
12(3)  
11  
tf(IO)out  
tr(IO)out  
tEXTIpw  
CL = 50 pF, VDD = 2.7 V to 3.6 V  
CL = 50 pF, VDD = 2 V to 2.7 V  
CL = 30 pF, VDD = 2.7 V to 3.6 V  
CL = 50 pF, VDD = 2.7 V to 3.6 V  
CL = 50 pF, VDD = 2 V to 2.7 V  
ns  
Output low to high  
level rise time  
Pulse width of  
external signals  
detected by the EXTI  
controller  
-
10  
ns  
1. The I/O speed is configured using the MODEx[1:0] bits. Refer to the STM32F10xxx reference manual for a  
description of GPIO Port configuration register.  
2. The maximum frequency is defined in Figure 29.  
3. Guaranteed by design, not tested in production.  
62/96  
Doc ID 13587 Rev 12