Electrical characteristics
STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB
Table 25. Low-power mode wakeup timings (continued)
Symbol
Parameter
Typ
Unit
Wakeup from Stop mode (regulator in run mode)
Wakeup from Stop mode (regulator in low-power mode)
Wakeup from Standby mode
3.6
5.4
50
(1)
µs
µs
tWUSTOP
(1)
tWUSTDBY
1. The wakeup times are measured from the wakeup event to the point at which the user application code
reads the first instruction.
5.3.8
PLL characteristics
The parameters given in Table 26 are derived from tests performed under the ambient
temperature and V supply voltage conditions summarized in Table 8.
DD
Table 26. PLL characteristics
Value
Symbol
Parameter
Unit
Min(1)
Typ
Max(1)
PLL input clock(2)
1
8.0
24
60
MHz
%
fPLL_IN
PLL input clock duty cycle
PLL multiplier output clock
PLL lock time
40
16
fPLL_OUT
tLOCK
24
MHz
µs
200
300
Jitter
Cycle-to-cycle jitter
ps
1. Based on device characterization, not tested in production.
2. Take care of using the appropriate multiplier factors so as to have PLL input clock values compatible with
the range defined by fPLL_OUT
.
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Doc ID 16455 Rev 2