STM32F405xx, STM32F407xx
Application block diagrams
A.2
USB OTG high speed (HS) interface solutions
Figure 89. USB controller configured as peripheral, host, or dual-mode
and used in high speed mode
STM32F4xx
FS PHY
DP
not connected
DM
USB HS
OTG Ctrl
DP
ULPI_CLK
DM
ULPI_D[7:0]
(2)
ID
VBUS
USB
connector
ULPI_DIR
ULPI_STP
ULPI
VSS
ULPI_NXT
High speed
OTG PHY
XT1
PLL
24 or 26 MHz XT(1)
MCO1 or MCO2
XI
MS19005V2
1. It is possible to use MCO1 or MCO2 to save a crystal. It is however not mandatory to clock the STM32F40x
with a 24 or 26 MHz crystal when using USB HS. The above figure only shows an example of a possible
connection.
2. The ID pin is required in dual role only.
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