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STA326 参数 Datasheet PDF下载

STA326图片预览
型号: STA326
PDF下载: 下载PDF文件 查看货源
内容描述: 2.1高效率的数字音频系统 [2.1 HIGH EFFICIENCY DIGITAL AUDIO SYSTEM]
分类和应用: 功效
文件页数/大小: 43 页 / 1858 K
品牌: STMICROELECTRONICS [ ST ]
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STA326  
7.3 Serial Data Interface  
The STA326 serial audio input was designed to interface with standard digital audio components and to  
accept a number of serial data formats. The STA326 always acts as a slave when receiving audio input  
from standard digital audio components. Serial data for two channels is provided using 3 input pins: left/  
right clock LRCKI (pin 33), serial clock BICKI (pin 31), and serial data 1 & 2 SDI12 (pin 32).  
The SAI register (Configuration Register B - 01h, Bits D3-D0) and the SAIFB register (Configuration Reg-  
ister B - 01h, Bit D4) are used to specify the serial data format. The default serial data format is I2S, MSB-  
First. Available formats are shown in Figure 11 and the tables that follow.  
Figure 11. General Serial Input and Output Formats  
I2S  
Left  
Right  
LRCLK  
SCLK  
MSB  
LSB  
MSB  
LSB  
MSB  
SDATA  
Left Justified  
Left  
Right  
LRCLK  
SCLK  
SDATA  
MSB  
LSB  
MSB  
LSB  
MSB  
Right Justified  
Left  
Right  
LRCLK  
SCLK  
SDATA  
MSB  
LSB  
MSB  
LSB  
MSB  
For example, SAI=1110 and SAIFB=1 would specify Right-Justified 16-bit data, LSB-First.  
Table 10 below lists the serial audio input formats supported by STA326 as related to BICKI = 32/48/64fs,  
where the sampling rate fs = 32/44.1/48/88.2/96/176.4/192 kHz.  
Table 9. First Bit Selection Table  
SAIFB  
Format  
MSB-First  
LSB-First  
0
1
Note: Serial input and output formats are specified distinctly.  
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