EXTENDED FUNCTION TIMER (EFT)
EXTENDED FUNCTION TIMER (Cont’d)
10.3.5 Register Description
INPUT CAPTURE 1 LOW REGISTER (IC1LR)
R241 - Read Only
Register Page: 28
Each Timer is associated with three control and
one status registers, and with six pairs of data reg-
isters (16-bit values) relating to the two input cap-
tures, the two output compares, the counter and
the alternate counter.
Reset Value: Undefined
This is an 8-bit read only register that contains the
low part of the counter value (transferred by the in-
put capture 1 event).
Notes:
7
0
1. In the register description on the following pag-
es, register and page numbers are given using the
example of Timer 0. On devices with more than
one timer, refer to the device register map for the
adresses and page numbers.
MSB
LSB
INPUT CAPTURE 2 HIGH REGISTER (IC2HR)
2. To work correctly with register pairs, it is strong-
ly recommended to use single byte instructions.
Do not use word instructions to access any of the
16-bit registers.
R242 - Read Only
Register Page: 28
Reset Value: Undefined
This is an 8-bit read only register that contains the
high part of the counter value (transferred by the
Input Capture 2 event).
INPUT CAPTURE 1 HIGH REGISTER (IC1HR)
R240 - Read Only
Register Page: 28
7
0
Reset Value: Undefined
This is an 8-bit read only register that contains the
high part of the counter value (transferred by the
input capture 1 event).
MSB
LSB
7
0
INPUT CAPTURE 2 LOW REGISTER (IC2LR)
MSB
LSB
R243 - Read Only
Register Page: 28
Reset Value: Undefined
This is an 8-bit read only register that contains the
low part of the counter value (transferred by the In-
put Capture 2 event).
7
0
MSB
LSB
180/426
9
STMICROELECTRONICS [ ST ]
