Internal Flash memory
ST10F276E
4.4.8
Flash non-volatile access protection register 1 high
FNVAPR1H (0x0E DFBE)
15 14 13 12
NVR
8
Delivery value: FFFFh
11
10
9
7
6
5
4
3
2
1
0
PEN15 PEN14 PEN13 PEN12 PEN11 PEN10 PEN9 PEN8 PEN7 PEN6 PEN5 PEN4 PEN3 PEN2 PEN1 PEN0
RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW
Table 25. Flash non-volatile access protection register 1 high
Bit
Function
Protections Enable 15-0
If bit PENx is programmed at 0 and bit PDSx+1 is erased at 1, the action of bit ACCP
is enabled again. Bit PENx can be programmed at 0 only if bit PDSx has already been
programmed at 0.
PEN15-0
4.4.9
Access protection
The Flash modules have one level of access protection (access to data both in Reading and
Writing): if bit ACCP of FNVAPR0 is programmed at 0, the IFlash module become access
protected: data in the IFlash module can be read/written only if the current execution is from
the IFlash module itself.
Protection can be permanently disabled by programming bit PDS0 of FNVAPR1H, in order
to analyze rejects. Allowing PDS0 bit programming only when ACCP bit is programmed,
guarantees that only an execution from the Flash itself can disable the protections.
Protection can be permanently enabled again by programming bit PEN0 of FNVAPR1L. The
action to disable and enable again Access Protections in a permanent way can be executed
a maximum of 16 times.
Trying to write into the access protected Flash from internal RAM will be unsuccessful.
Trying to read into the access protected Flash from internal RAM will output a dummy data.
When the Flash module is protected in access, also the data access through PEC of a
peripheral is forbidden. To read/write data in PEC mode from/to a protected bank, first it is
necessary to temporary unprotect the Flash module.
Due to ST10 architecture, the XFLASH is seen as external memory: this makes impossible
to access protect it from real external memory or internal RAM. Table 26 summarizes all
levels of possible Access protection: in particular, supposing to enable all possible access
protections, when fetching from a memory as listed in the first column, what is possible and
what is not possible to do (see column headers) is shown in the table.
Table 26. Summary of access protection level
Read IFLASH/ Read XFLASH/
Read FLASH
Registers
Write FLASH
Registers
Memory fetch source
Jump to
IFLASH
Jump to
XFLASH
Fetching from IFLASH
Fetching from XFLASH
Fetching from IRAM
Yes / Yes
No / Yes
No / Yes
Yes / Yes
Yes / Yes
Yes / Yes
Yes
Yes
Yes
Yes
No
No
40/235
Doc ID 12303 Rev 3
STMICROELECTRONICS [ ST ]
