M95640-W M95640-R M95640-DF
DC and AC parameters
New products(1)
Table 19. AC characteristics (M95640-W, device grade 6)
Test conditions specified in Table 9 and Table 12
VCC = 2.5 to 5.5 V
VCC = 4.5 to 5.5 V
Unit
Symbol
Alt.
Parameter
Min.
Max.
Min.
Max.
fC
fSCK Clock frequency
D.C.
30
30
40
30
30
42
40
10
D.C.
15
15
20
15
15
20
20
20
MHz
ns
ns
ns
ns
ns
ns
ns
µs
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
tSLCH
tSHCH
tSHSL
tCHSH
tCHSL
tCSS1 S active setup time
tCSS2 S not active setup time
tCS
S deselect time
tCSH S active hold time
S not active hold time
tCLH Clock high time
tCLL Clock low time
(2)
tCH
(2)
tCL
(3)
tCLCH
tRC
tFC
Clock rise time
Clock fall time
2
2
2
2
(3)
tCHCL
tDVCH
tCHDX
tHHCH
tHLCH
tCLHL
tCLHH
tDSU Data in setup time
10
10
30
30
0
5
10
15
15
0
tDH
Data in hold time
Clock low hold time after HOLD not active
Clock low hold time after HOLD active
Clock low set-up time before HOLD active
Clock low set-up time before HOLD not active
0
0
(3)
tSHQZ
tDIS Output disable time
tV Clock low to output valid
40
40
20
20
(4)
tCLQV
tCLQX
tHO Output hold time
tRO Output rise time
0
0
(3)
tQLQH
40
40
40
40
5
20
20
20
20
5
(3)
tQHQL
tFO
tLZ
tHZ
Output fall time
tHHQV
HOLD high to output valid
HOLD low to output high-Z
(3)
tHLQZ
tW
tWC Write time
1. For devices identified by process letter K.
2. tCH + tCL must never be lower than the shortest possible clock period, 1/fC(max).
3. Characterized only, not tested in production.
4. tCLQV must be compatible with tCL (clock low time): if the SPI bus master offers a Read setup time tSU = 0 ns, tCL can be
equal to (or greater than) tCLQV; in all other cases, tCL must be equal to (or greater than) tCLQV+tSU
.
Doc ID 16877 Rev 16
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STMICROELECTRONICS [ ST ]
