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M95640-WMN6TP/P 参数 Datasheet PDF下载

M95640-WMN6TP/P图片预览
型号: M95640-WMN6TP/P
PDF下载: 下载PDF文件 查看货源
内容描述: [8KX8 SPI BUS SERIAL EEPROM, PDSO8, 0.169 INCH, HALOGEN FREE AND ROHS COMPLIANT, PLASTIC, TSSOP-8]
分类和应用: 可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟光电二极管内存集成电路
文件页数/大小: 47 页 / 620 K
品牌: STMICROELECTRONICS [ ST ]
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M95640-W M95640-R M95640-DF  
Instructions  
6.10  
Lock ID (available only in M95640-D devices)  
The Lock ID instruction permanently locks the Identification Page in read-only mode. Before  
this instruction can be accepted, a Write Enable (WREN) instruction must have been  
executed.  
The Lock ID instruction is issued by driving Chip Select (S) low, sending the instruction  
code, the address and a data byte on Serial Data Input (D), and driving Chip Select (S) high.  
In the address sent, A10 must be equal to 1, all other address bits are Don't Care. The data  
byte sent must be equal to the binary value xxxx xx1x, where x = Don't Care.  
Chip Select (S) must be driven high after the rising edge of Serial Clock (C) that latches in  
the eighth bit of the data byte, and before the next rising edge of Serial Clock (C). Otherwise,  
the Lock ID instruction is not executed.  
Driving Chip Select (S) high at a byte boundary of the input data triggers the self-timed write  
cycle whose duration is t (as specified in AC characteristics in Section 9: DC and AC  
W
parameters). The instruction sequence is shown in Figure 17.  
The instruction is discarded, and is not executed, under the following conditions:  
If a Write cycle is already in progress,  
If the Block Protect bits (BP1,BP0) = (1,1),  
If a rising edge on Chip Select (S) happens outside of a byte boundary.  
Figure 17. Lock ID sequence  
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Doc ID 16877 Rev 16  
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