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M95640-WMN6TP/P 参数 Datasheet PDF下载

M95640-WMN6TP/P图片预览
型号: M95640-WMN6TP/P
PDF下载: 下载PDF文件 查看货源
内容描述: [8KX8 SPI BUS SERIAL EEPROM, PDSO8, 0.169 INCH, HALOGEN FREE AND ROHS COMPLIANT, PLASTIC, TSSOP-8]
分类和应用: 可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟光电二极管内存集成电路
文件页数/大小: 47 页 / 620 K
品牌: STMICROELECTRONICS [ ST ]
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M95640-W M95640-R M95640-DF  
Instructions  
6.6.1  
Cycling with Error Correction Code (ECC)  
M95640-x and M95640-Dx devices identified by the process letter K offer an Error  
Correction Code (ECC) logic. The ECC is an internal logic function which is transparent for  
the SPI communication protocol.  
(c)  
The ECC logic is implemented on each group of four EEPROM bytes . Inside a group, if a  
single bit out of the four bytes happens to be erroneous during a Read operation, the ECC  
detects this bit and replaces it with the correct value. The read reliability is therefore much  
improved.  
Even if the ECC function is performed on groups of four bytes, a single byte can be  
written/cycled independently. In this case, the ECC function also writes/cycles the three  
(c)  
other bytes located in the same group . As a consequence, the maximum cycling budget is  
defined at group level and the cycling can be distributed over the four bytes of the group: the  
sum of the cycles seen by byte0, byte1, byte2 and byte3 of the same group must remain  
below the maximum value defined in Table 14.  
c. A group of four bytes is located at addresses [4*N, 4*N+1, 4*N+2, 4*N+3], where N is an integer.  
Doc ID 16877 Rev 16  
25/47  
 
 
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