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M95640-WMN6TP/P 参数 Datasheet PDF下载

M95640-WMN6TP/P图片预览
型号: M95640-WMN6TP/P
PDF下载: 下载PDF文件 查看货源
内容描述: [8KX8 SPI BUS SERIAL EEPROM, PDSO8, 0.169 INCH, HALOGEN FREE AND ROHS COMPLIANT, PLASTIC, TSSOP-8]
分类和应用: 可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟光电二极管内存集成电路
文件页数/大小: 47 页 / 620 K
品牌: STMICROELECTRONICS [ ST ]
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M95640-W M95640-R M95640-DF  
Operating features  
5
Operating features  
5.1  
Supply voltage (VCC)  
5.1.1  
Operating supply voltage V  
CC  
Prior to selecting the memory and issuing instructions to it, a valid and stable V voltage  
CC  
within the specified [V (min), V (max)] range must be applied (see Operating conditions  
CC  
CC  
in Section 9: DC and AC parameters). This voltage must remain stable and valid until the  
end of the transmission of the instruction and, for a Write instruction, until the completion of  
the internal write cycle (t ). In order to secure a stable DC supply voltage, it is  
W
recommended to decouple the V line with a suitable capacitor (usually of the order of  
CC  
10 nF to 100 nF) close to the V /V device pins.  
CC SS  
5.1.2  
Device reset  
In order to prevent erroneous instruction decoding and inadvertent Write operations during  
power-up, a power-on-reset (POR) circuit is included. At power-up, the device does not  
respond to any instruction until VCC reaches the POR threshold voltage. This threshold is  
lower than the minimum V operating voltage (see Operating conditions in Section 9: DC  
CC  
and AC parameters).  
At power-up, when V passes over the POR threshold, the device is reset and is in the  
CC  
following state:  
in Standby Power mode,  
deselected,  
Status Register values:  
The Write Enable Latch (WEL) bit is reset to 0.  
The Write In Progress (WIP) bit is reset to 0.  
The SRWD, BP1 and BP0 bits remain unchanged (non-volatile bits).  
It is important to note that the device must not be accessed until V reaches a valid and  
CC  
stable level within the specified [V (min), V (max)] range, as defined under Operating  
CC  
CC  
conditions in Section 9: DC and AC parameters.  
5.1.3  
Power-up conditions  
When the power supply is turned on, V rises continuously from V to V . During this  
CC  
SS  
CC  
time, the Chip Select (S) line is not allowed to float but should follow the V voltage. It is  
CC  
therefore recommended to connect the S line to V via a suitable pull-up resistor (see  
CC  
Figure 4).  
In addition, the Chip Select (S) input offers a built-in safety feature, as the S input is edge-  
sensitive as well as level-sensitive: after power-up, the device does not become selected  
until a falling edge has first been detected on Chip Select (S). This ensures that Chip Select  
(S) must have been high, prior to going low to start the first operation.  
The V voltage has to rise continuously from 0 V up to the minimum V operating voltage  
CC  
CC  
defined under Operating conditions in Section 9: DC and AC parameters, and the rise time  
must not vary faster than 1 V/µs.  
Doc ID 16877 Rev 16  
13/47  
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