M93C86, M93C76, M93C66, M93C56, M93C46
Instructions
Table 6.
Instruction set for the M93C56 and M93C66
x8 origination (ORG = 0)
x16 origination (ORG = 1)
Start Op-
bit code
Instruction
Description
Address
Required Address
clock cycles
Required
clock cycles
Data
Data
(1) (2)
(1) (3)
Read Data from
Memory
READ
WRITE
WEN
1
1
1
1
1
1
1
10
01
00
00
11
00
00
A8-A0
A8-A0
Q7-Q0
D7-D0
A7-A0 Q15-Q0
A7-A0 D15-D0
Write Data to
Memory
20
12
12
12
12
20
27
11
11
11
11
27
1 1XXX
XXXX
11XX
XXXX
Write Enable
Write Disable
0 0XXX
XXXX
00XX
XXXX
WDS
Erase Byte or
Word
ERASE
ERAL
WRAL
A8-A0
A7-A0
Erase All
Memory
1 0XXX
XXXX
10XX
XXXX
Write All Memory
with same Data
0 1XXX
XXXX
01XX
D7-D0
D15-D0
XXXX
1. X = Don't Care bit.
2. Address bit A8 is not decoded by the M93C56.
3. Address bit A7 is not decoded by the M93C56.
Table 7.
Instruction set for the M93C76 and M93C86
x8 Origination (ORG = 0)
x16 Origination (ORG = 1)
Start Op-
bit code
Required
clock
Required
Address
Instruction
Description
Address(1),
Data
Data
clock
(2)
(1) (3)
cycles
cycles
Read Data from
Memory
READ
WRITE
WEN
1
1
1
10
01
00
A10-A0
A10-A0
Q7-Q0
D7-D0
A9-A0 Q15-Q0
A9-A0 D15-D0
Write Data to
Memory
22
14
29
13
11X XXXX
XXXX
11XXXX
XXXX
Write Enable
00X XXXX
XXXX
00XXXX
XXXX
WDS
Write Disable
1
1
1
00
11
00
14
14
14
13
13
13
ERASE
ERAL
Erase Byte or Word
Erase All Memory
A10-A0
A9-A0
10X XXXX
XXXX
10XXXX
XXXX
Write All Memory
with same Data
01X XXXX
XXXX
01XXXX
D15-D0
XXXX
WRAL
1
00
D7-D0
22
29
1. X = Don't Care bit.
2. Address bit A10 is not decoded by the M93C76.
3. Address bit A9 is not decoded by the M93C76.
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