Clock operation
M41T81
(1)
Table 2.
Addr
Clock register map
Function/range BCD
format
D7
D6
D5
D4
D3
D2
D1
D0
00h
01h
02h
0.1 seconds
0.01 seconds
Seconds
Seconds
Seconds
Minutes
00-99
00-59
00-59
ST
0
10 seconds
10 minutes
Minutes
Century/
hours
03h
CEB
CB
10 hours
Hours (24 hour format)
0-1/00-23
04h
05h
0
0
0
0
0
0
0
0
0
Day of week
Date: day of month
Month
Day
Date
01-7
01-31
01-12
00-99
10 date
06h
0
10M
Month
07h
10 years
Year
Year
08h
OUT
0
FT
S
Calibration
Control
Watchdog
Al month
Al date
Al hour
Al min
09h
BMB4
SQWE
RPT5
HT
BMB3
ABE
BMB2
BMB1
BMB0
RB1
RB0
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
AFE
RPT4
RPT3
RPT2
RPT1
WDF
0
Al 10M
Alarm month
01-12
01-31
00-23
00-59
00-59
AI 10 date
AI 10 hour
Alarm date
Alarm hour
Alarm 10 minutes
Alarm minutes
Alarm seconds
Alarm 10 seconds
Al sec
AF
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Flags
10h
Reserved
Reserved
Reserved
SQW
11h
0
0
0
12h
0
0
0
13h
RS3
RS2
RS1
RS0
1. Keys:
S = Sign Bit
FT = Frequency Test Bit
ST = Stop Bit
0 = Must be set to '0'
BMB0-BMB4 = Watchdog Multiplier Bits
CEB = Century Enable Bit
CB = Century Bit
OUT = Output level
ABE = Alarm in Battery Back-up Mode Enable Bit
AFE = Alarm Flag Enable Flag
RB0-RB1 = Watchdog Resolution Bits
RPT1-RPT5 = Alarm Repeat Mode Bits
WDF = Watchdog Flag (Read only)
AF = Alarm Flag (Read only)
SQWE = Square Wave Enable
RS0-RS3 = SQW Frequency
HT = Halt Update Bit
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