Application information
Typically, RSS and CSS are selected based on the following relationships:
Equation 5
L6599A
RFmin
fstart
3⋅10−3
RSS
RSS
=
; CSS =
−1
fmin
where fstart is recommended to be at least 4 times fmin. The proposed criterion for CSS is
quite empirical and is a compromise between an effective soft-start action and an effective
OCP (see next section). Please refer to the timing diagram of Figure 27 to see some
significant signals during the soft-start phase.
7.4
Current sense, OCP and OLP
The resonant half bridge is essentially voltage-mode controlled; therefore a current sense
input only serves as an overcurrent protection (OCP).
Unlike PWM-controlled converters, where energy flow is controlled by the duty cycle of the
primary switch (or switches), in a resonant half bridge the duty cycle is fixed and energy flow
is controlled by its switching frequency. This impacts on the way current limitation can be
realized. While in PWM-controlled converters energy flow can be limited simply by
terminating switch conduction beforehand when the sensed current exceeds a preset
threshold (this is commonly known as cycle-by-cycle limitation), in a resonant half bridge the
switching frequency, that is, its oscillator frequency must be increased and this cannot be
done as quickly as turning off a switch: it takes at least the next oscillator cycle to see the
frequency change. This implies that, to have an effective increase able to change the energy
flow significantly, the rate of change of the frequency must be slower than the frequency
itself. This, in turn, implies that cycle-by-cycle limitation is not feasible and that, therefore,
the information on the primary current fed to the current sensing input must be somehow
averaged. Of course, the averaging time must not be too long to prevent the primary current
from reaching too high values.
In Figure 28 a couple of current sensing methods are illustrated and are described in the
following. The circuit of Figure 28a is simpler but the dissipation on the sense resistor Rs
might not be negligible, damaging efficiency; the circuit of Figure 28b is more complex but
virtually lossless and recommended when the efficiency target is very high.
22/35
Doc ID 15308 Rev 7
STMICROELECTRONICS [ ST ]
