4 Mbit SuperFlash EEPROM
SST28SF040A / SST28VF040A
Data Sheet
TABLE 13: ERASE/PROGRAM CYCLE TIMING PARAMETERS
SST28SF040A
SST28VF040A
IEEE
Symbol
Industry
Symbol
Parameter
Min
Max
Min
Max
Units
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
µs
ms
ns
ns
ns
ns
ns
tAVA
TBP
TWP
TAS
Byte-Program Cycle Time
Write Pulse Width (WE#)
Address Setup Time
40
40
tWLWH
tAVWL
tWLAX
tELWL
tWHEX
tGHWL
tWGL
90
10
50
0
100
10
TAH
Address Hold Time
100
0
TCS
TCH
TOES
TOEH
TCP
TDS
TDH
TSE
CE# Setup Time
CE# Hold Time
0
0
OE# High Setup Time
OE# High Hold Time
10
10
90
50
10
20
20
tWLEH
tDVWH
tWHDX
tWHWL2
Write Pulse Width (CE#)
Data Setup Time
100
100
20
Data Hold Time
Sector-Erase Cycle Time
Reset Command Recovery Time
Software Chip-Erase Cycle Time
CE# High Pulse Width
WE# High Pulse Width
Protect CE# or OE# Pulse Width
Protect CE# or OE# High Time
Protect Address Setup Time
Protect Address Hold Time
4
4
4
4
1
TRST
tWHWL3
tEHEL
TSCE
TCPH
TWPH
20
20
50
50
50
50
40
0
50
50
50
50
40
0
tWHWL1
1
TPCP
1
TPCH
1
TPAS
1
TPAH
ns
T13.6 310
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
©2001 Silicon Storage Technology, Inc.
S71077-04-000 6/01 310
11
SST [ SILICON STORAGE TECHNOLOGY, INC ]
