4 Mbit SuperFlash EEPROM
SST28SF040A / SST28VF040A
Data Sheet
OE#
T
PCH
T
PCP
CE#
WE#
ADDRESS
1823
1820
1822
0418
041B
0419
041A
T
PAH
T
PAS
NOTE: A. ADDRESSES ARE LATCHED INTERNALLY ON THE RISING EDGE OF:
1. OE# IF CE# IS KEPT AT LOW ALL TIME.
2. CE# IF OE# IS KEPT AT LOW ALL TIME.
3. THE FIRST PIN TO GO HIGH IF BOTH ARE TOGGLED.
B. ABOVE ADDRESS VALUES ARE IN HEX.
C. ADDRESSES > A12 ARE "DON'T CARE"
310 ILL F09.4
FIGURE 10: SOFTWARE DATA UNPROTECT DISABLE TIMING DIAGRAM
OE#
T
PCH
T
PCP
CE#
WE#
ADDRESS
1823
1820
1822
0418
041B
0419
040A
T
PAH
T
PAS
NOTE: A. ADDRESSES ARE LATCHED INTERNALLY ON THE RISING EDGE OF:
1. OE# IF CE# IS KEPT AT LOW ALL TIME.
2. CE# IF OE# IS KEPT AT LOW ALL TIME.
3. THE FIRST PIN TO GO HIGH IF BOTH ARE TOGGLED.
B. ABOVE ADDRESS VALUES ARE IN HEX.
C. ADDRESSES > A12 ARE "DON'T CARE"
310 ILL F10.4
FIGURE 11: SOFTWARE DATA PROTECT DISABLE TIMING DIAGRAM
©2001 Silicon Storage Technology, Inc.
S71077-04-000 6/01 310
15
SST [ SILICON STORAGE TECHNOLOGY, INC ]
