1.8V Serial Quad I/O (SQI) Flash Memory
SST26WF032
Advance Information
Power-Up Specifications
All functionalities and DC specifications are specified for a VDD ramp rate of greater than 1V per 100
ms (0V to 1.65V in less than 270 ms). See Table 11 and Figure 26 for more information.
Table 11: Recommended System Power-up Timings
Symbol
Parameter
Minimum
100
Units
µs
1
TPU-READ
VDD Min to Read Operation
VDD Min to Write Operation
1
TPU-WRITE
100
µs
T11.0 1409
1. This parameter is measured only for initial qualification and after a design or process change that could affect this
parameter.
VDD
VDD Max
Chip selection is not allowed.
Commands may not be accepted or properly
interpreted by the device.
VDD Min
TPU-READ
TPU-WRITE
Device fully accessible
Time
1409 F27.0
Figure 26:Power-up Timing Diagram
©2010 Silicon Storage Technology, Inc.
S71409-01-000
01/10
29
SST [ SILICON STORAGE TECHNOLOGY, INC ]
