1.8V Serial Quad I/O (SQI) Flash Memory
SST26WF032
Advance Information
T
CPH
CE#
CLK
MODE 3
MODE 0
MODE 3
MODE 0
MODE 3
MODE 0
SIO(3:0)
C1 C0
C3 C2
1409 F14.0
Note: C[1:0] = 55H; C[3:2] = AAH
Figure 29:Reset Timing Diagram
V
IHT
V
V
HT
HT
INPUT
REFERENCE POINTS
OUTPUT
V
V
LT
LT
V
ILT
1409 F28.0
AC test inputs are driven at VIHT (0.9VDD) for a logic ‘1’ and VILT (0.1VDD) for a logic ‘0’.
Measurement reference points for inputs and outputs are VHT (0.6VDD) and VLT (0.4VDD).
Input rise and fall times (10% ↔ 90%) are <3 ns.
Note: VHT - VHIGH Test
V
V
V
LT - VLOW Test
IHT - VINPUT HIGH Test
ILT - VINPUT LOW Test
Figure 30:AC Input/Output Reference Waveforms
©2010 Silicon Storage Technology, Inc.
S71409-01-000
01/10
33
SST [ SILICON STORAGE TECHNOLOGY, INC ]
