16 Mbit SPI Serial Flash
SST25VF016B
A Microchip Technology Company
Data Sheet
Write-Enable (WREN)
The Write-Enable (WREN) instruction sets the Write-Enable-Latch bit in the Status Register to 1 allow-
ing Write operations to occur. The WREN instruction must be executed prior to any Write (Program/
Erase) operation. The WREN instruction may also be used to allow execution of the Write-Status-Reg-
ister (WRSR) instruction; however, the Write-Enable-Latch bit in the Status Register will be cleared
upon the rising edge CE# of the WRSR instruction. CE# must be driven high before the WREN instruc-
tion is executed.
CE#
MODE 3
0
1 2 3 4 5 6 7
MODE 0
SCK
06
SI
MSB
HIGH IMPEDANCE
SO
1271 WREN.0
Figure 17:Write Enable (WREN) Sequence
Write-Disable (WRDI)
The Write-Disable (WRDI) instruction resets the Write-Enable-Latch bit and AAI bit to 0 disabling any
new Write operations from occurring. The WRDI instruction will not terminate any programming opera-
tion in progress. Any program operation in progress may continue up to TBP after executing the WRDI
instruction. CE# must be driven high before the WRDI instruction is executed.
CE#
MODE 3
0
1
2
3
4 5 6 7
MODE 0
SCK
04
SI
MSB
HIGH IMPEDANCE
SO
1271 WRDI.0
Figure 18:Write Disable (WRDI) Sequence
©2011 Silicon Storage Technology, Inc.
S71271-04-000
01/11
18
SST [ SILICON STORAGE TECHNOLOGY, INC ]
