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ICS87951AYI 参数 Datasheet PDF下载

ICS87951AYI图片预览
型号: ICS87951AYI
PDF下载: 下载PDF文件 查看货源
内容描述: [PLL Based Clock Driver, 87951 Series, 9 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7 X 1.40 MM, MS-026, LQFP-32]
分类和应用: 驱动逻辑集成电路
文件页数/大小: 13 页 / 142 K
品牌: SPECTRUM [ SPECTRUM MICROWAVE, INC. ]
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ICS87951I  
LOW SKEW, 1-TO-9  
DIFFERENTIAL-TO-LVCMOS/LVTTL ZERO DELAY BUFFER  
Integrated  
Circuit  
Systems, Inc.  
DIFFERENTIAL CLOCK INPUT INTERFACE  
The CLK1 /nCLK1 accepts LVDS, LVPECL, LVHSTL, SSTL, here are examples only. Please consult with the vendor of the  
HCSL and other differential signals. Both VSWING and VOH must driver component to confirm the driver termination requirements.  
meet theVPP andVCMR input requirements. Figures 4A to 4D show For example in Figure 3A, the input termination applies for ICS  
interface examples for the HiPerClockS CLK1/nCLK1 input driven HiPerClockS LVHSTL drivers. If you are using an LVHSTL driver  
by the most common driver types.The input interfaces suggested from another vendor, use their termination recommendation.  
3.3V  
3.3V  
3.3V  
1.8V  
Zo = 50 Ohm  
CLK  
Zo = 50 Ohm  
CLK  
Zo = 50 Ohm  
nCLK  
Zo = 50 Ohm  
HiPerClockS  
Input  
LVPECL  
nCLK  
HiPerClockS  
Input  
LVHSTL  
R1  
50  
R2  
50  
ICS  
HiPerClockS  
R1  
50  
R2  
50  
LVHSTL Driver  
R3  
50  
FIGURE 3A. HIPERCLOCKS CLK/NCLK INPUT DRIVEN BY  
ICS HIPERCLOCKS LVHSTL DRIVER  
FIGURE 3B. HIPERCLOCKS CLK/NCLK INPUT DRIVEN BY  
3.3V LVPECL DRIVER  
3.3V  
3.3V  
3.3V  
3.3V  
Zo = 50 Ohm  
3.3V  
R3  
125  
R4  
125  
LVDS_Driver  
Zo = 50 Ohm  
Zo = 50 Ohm  
CLK  
CLK  
R1  
100  
nCLK  
Receiv er  
nCLK  
HiPerClockS  
Input  
Zo = 50 Ohm  
LVPECL  
R1  
84  
R2  
84  
FIGURE 3C. HIPERCLOCKS CLK/NCLK INPUT DRIVEN BY  
3.3V LVPECL DRIVER  
FIGURE 3D. HIPERCLOCKS CLK/NCLK INPUT DRIVEN BY  
3.3V LVDS DRIVER  
RECOMMENDATIONS FOR UNUSED INPUT AND OUTPUT PINS  
INPUTS:  
CLK INPUT:  
OUTPUTS:  
LVCMOS OUTPUT:  
For applications not requiring the use of a clock input, it can All unused LVCMOS output can be left floating. We  
be left floating. Though not required, but for additional recommend that there is no trace attached.  
protection, a 1kΩ resistor can be tied from the CLK input to  
ground.  
CLK/nCLK INPUT:  
For applications not requiring the use of the differential input,  
both CLK and nCLK can be left floating. Though not required,  
but for additional protection, a 1kΩ resistor can be tied from  
CLK to ground.  
LVCMOS CONTROL PINS:  
All control pins have internal pull-ups or pull-downs; additional  
resistance is not required but can be added for additional  
protection. A 1kΩ resistor can be used.  
87951AYI  
www.icst.com/products/hiperclocks.html  
REV.B NOVEMBER 23, 2005  
9
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