ICS87951I
LOW SKEW, 1-TO-9
DIFFERENTIAL-TO-LVCMOS/LVTTL ZERO DELAY BUFFER
Integrated
Circuit
Systems, Inc.
REVISION HISTORY SHEET
Rev
Table
Page
Description of Change
Date
T1
T2
3
3
Pin Description Table - revised MR/nOE description.
Pin Characteristics Table - changed CIN 4pf max. to 4pf typical.
Added ROUT row.
B
5
DC Characteristics - changed VIH CLK0 from 3.6V max to VDD + 0.3V and
added VIL CLK0 row.
7/10/03
8
Updated Single Ended Signal Driving Differential Input diagram.
9
1
Added CLK/nCLK Input Interface section.
Features Section - added lead-free bullet.
9
12
Added Recommendations for Unused Input and Output Pins.
Ordering Information Table - added lead-free part number, marking, and note.
11/23/05
T9
87951AYI
www.icst.com/products/hiperclocks.html
REV.B NOVEMBER 23, 2005
13