ICS87951I
LOW SKEW, 1-TO-9
DIFFERENTIAL-TO-LVCMOS/LVTTL ZERO DELAY BUFFER
Integrated
Circuit
Systems, Inc.
TABLE 5. PLL INPUT REFERENCE CHARACTERISTICS, VDDA = VDDO = 3.3V 5ꢂ, TA = -40°C TO 85°C
Symbol
Parameter
Test Conditions
Minimum Typical Maximum Units
fREF
Input Reference Frequency
100
MHz
TABLE 6. AC CHARACTERISTICS, VDDA = VDDO = 3.3V 5ꢂ, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
QA ÷2
Minimum
Typical
Maximum
180
Units
MHz
MHz
MHz
MHz
ps
fMAX
Output Frequency
QA/QB ÷4
QB ÷8
120
60
fVCO
PLL VCO Lock Range
200
480
CLK0
-185
15
165
Static Phase Offset;
NOTE 1,3
fREF = 50MHz,
Feedback = VCO/8
tꢀØꢁ
CLK1,
nCLK1
-445
-265
-95
ps
ps
Same Frequencies
375
Different Frequencies
QAfMAX < 150MHz
QAfMAX > 150MHz
tskꢀoꢁ
Output Skew; NOTE 2, 3
500
750
ps
ps
tjitꢀccꢁ
tLOCK
tR
Cycle-to-Cycle Jitter; NOTE 3
PLL Lock Time; NOTE 3
Output Rise Time
100
ps
mS
ns
ns
ps
ns
ns
10
0.8 to 2V
0.8 to 2V
0.1
0.1
1.0
tF
Output Fall Time
1.0
tPW
Output Pulse Width
Output Enable Time
tcycle/2 - 1000
tcycle/2 + 1000
tPZL
6
7
t
PLZ, tPHZ Output Disable Time
All parameters measured at fMAX unless noted otherwise.
NOTE 1: Defined as the time difference between the input reference clock and the averaged feedback input signal,
when the PLL is locked and the input reference frequency is stable.
NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions.
Measured at VDDO/2.
NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.
87951AYI
www.icst.com/products/hiperclocks.html
REV.B NOVEMBER 23, 2005
6
SPECTRUM [ SPECTRUM MICROWAVE, INC. ]
