SL15100
Input Capacitance
Load Capacitance
CIN2
CL
Pins 4 and 8
-
-
4
-
6
pF
pF
SSCLK/REFCLK , Pins 6 and 7
15
AC Electrical Characteristics (C-Grade)
Unless otherwise stated VDD= 2.5V+/- 10%, CL=15pF and Ambient Temperature range 0 to +85 Deg C
Parameter
Symbol
FIN1
Condition
Crystal or Ceramic Resonator
External Clock
Min
8
Typ
Max
48
Unit
MHz
MHz
MHz
MHz
MHz
%
Input Frequency Range
Input Frequency Range
Output Frequency Range
Output Frequency Range
Output Frequency Range
Output Duty Cycle
-
-
FIN2
8
166
200
48
FOUT1 SSCLK
3
-
FOUT2 REFCLK, crystal or resonator input
FOUT3 REFCLK, clock input
0.25
0.25
45
45
40
-
-
166
55
DC1
DC2
DCIN
tr/f1
SSCLK
50
50
50
Output Duty Cycle
REFCLK
55
%
Input Duty Cycle
Clock Input, Pin 3
60
%
Programmable, VDD=2.5
Output Rise/Fall Time
Output Rise/Fall Time
Output Rise/Fall Time
Output Rise/Fall Time
Output Rise/Fall Time
Output Rise/Fall Time
Output Rise/Fall Time
-
-
-
-
-
-
4.80
2.60
1.80
1.40
1.10
0.90
5.80
3.10
2.20
1.70
1.35
1.10
ns
ns
ns
ns
ns
ns
CL=15pF, 20 to 80% of VDD
tr/f2
tr/f3
tr/f4
tr/f5
tr/f6
tr/f7
CCJ1
Programmable, VDD=2.5
CL=15pF, 20 to 80% of VDD
Programmable, VDD=2.5
CL=15pF, 20 to 80% of VDD
Programmable, VDD=2.5
CL=15pF, 20 to 80% of VDD
Programmable, VDD=2.5
CL=15pF, 20 to 80% of VDD
Programmable, VDD=2.5
CL=15pF, 20 to 80% of VDD
Programmable, VDD=2.5
-
-
0.70
100
0.85
130
ns
ps
CL=15pF, 20 to 80% of VDD
CLKIN=SSCLK=166MHz,
2%Spread
Cycle-to-Cycle Jitter
(SSCLK – Pin 7)
REFCLK=Off
Cycle-to-Cycle Jitter
(SSCLK – Pin 7)
CCJ2
CCJ3
CCJ4
CCJ5
CLKIN=SSCLK=66MHz,
2%Spread, REFCLK=Off
-
-
-
-
110
130
110
115
140
170
140
150
ps
ps
ps
ps
Cycle-to-Cycle Jitter
(SSCLK – Pin 7)
CLKIN=SSCLK=33MHz,
2%Spread, REFCLK=Off
Cycle-to-Cycle Jitter
(SSCLK – Pin 7)
CLKIN=SSCLK=166MHz,
2%Spread REFCLK=On
Cycle-to-Cycle Jitter
(SSCLK – Pin 7)
CLKIN=SSCLK=66MHz,
2%Spread, REFCLK=On
Rev 1.8, August 10, 2007
Page 7 of 16
SPECTRALINEAR [ SPECTRALINEAR INC ]
