W311
DC Electrical Characteristics: TA = 0°C to +70°C, VDD = 3.3V 5% and 2.5V 5% (continued)
Parameter
Description
Test Condition
Min.
Typ.
Max.
Unit
Crystal Oscillator
VTH
X1 Input Threshold Voltage[5]
VDD = 3.3V
–
–
1.65
18
–
–
V
CLOAD
Load Capacitance, Imposed on
External Crystal[6]
pF
CIN,X1
X1 Input Capacitance[7]
Pin X2 unconnected
Except X1 and X2
–
28
–
pF
Pin Capacitance/Inductance
CIN Input Pin Capacitance
COUT
LIN
–
–
–
–
–
–
5
6
7
pF
pF
nH
Output Pin Capacitance
Input Pin Inductance
AC Electrical Characteristics
TA = 0°C to +70°C, VDD = 3.3V 5ꢀ, VDD = 2.5V 5ꢀfXTL = 14.31818 MHz
AC clock parameters are tested and guaranteed over stated operating conditions using the stated lump capacitive load at the
clock output; Spread Spectrum is disabled.
CPU Clock Outputs (Lump Capacitance Test Load = 20 pF)
CPU = 66.6 MHz CPU = 100 MHz CPU = 133 MHz
Test Condition
Parameter
tP
Description
Period
/Comments
Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Unit
Measuredonrisingedgeat 15
1.25
–
–
–
–
–
–
–
15.5 10
–
–
–
–
–
–
–
10.5 7.5
–
–
–
–
–
–
–
8.0
–
ns
tH
tL
High Time
Low Time
Duration of clock cycle
above 2.0V
5.2
5.0
1
–
–
3.0
2.8
1
–
–
1.87
1.67
1
ns
Duration of clock cycle
below 0.4V
–
ns
tR
tF
Output Rise Edge
Rate
Measured from 0.4V to
2.0V
4
4
4
V/ns
V/ns
%
Output Fall Edge
Rate
Measured from 2.0V to
0.4V
1
4
1
4
1
4
tD
tJC
Duty Cycle
Measured on rising and
falling edge at 1.25V
45
–
55
250
45
–
55
250
45
–
55
250
Jitter,
Cycle-to-Cycle
Measuredonrisingedgeat
1.25V. Maximum
ps
difference of cycle time
between two adjacent
cycles.
tSK
fST
Output Skew
Measuredonrisingedgeat
1.25V
–
–
–
–
175
3
–
–
–
–
175
3
–
–
–
–
175
3
ps
Frequency
Stabilization from
Assumes full supply
voltage reached within
ms
Power-up (cold start) 1 ms from power-up. Short
cycles exist prior to
frequency stabilization.
Zo
AC Output
Impedance
Average value during
switching transition. Used
for determining series
termination value.
–
20
–
–
20
–
–
20
–
:
Notes:
5. X1 input threshold voltage (typical) is 3.3V/2
6. The W311 contains an internal crystal load capacitor between pin X1 and ground and another between pin X2 and ground. Total load placed on crystal is 18 pF;
this includes typical stray capacitance of short PCB traces to crystal.
7. X1 input capacitance is applicable when driving X1 with an external clock source (X2 is left unconnected).
Rev 1.0,November 25, 2006
Page 15 of 18
SPECTRALINEAR [ SPECTRALINEAR INC ]
