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CY28372OXCT 参数 Datasheet PDF下载

CY28372OXCT图片预览
型号: CY28372OXCT
PDF下载: 下载PDF文件 查看货源
内容描述: 矽统746的AMD Athlon ™ / AMD的Duron ™时钟合成器 [SiS 746 AMD Athlon⑩/AMD Duron⑩ Clock Synthesizer]
分类和应用: 晶体外围集成电路光电二极管时钟
文件页数/大小: 17 页 / 227 K
品牌: SPECTRALINEAR [ SPECTRALINEAR INC ]
 浏览型号CY28372OXCT的Datasheet PDF文件第8页浏览型号CY28372OXCT的Datasheet PDF文件第9页浏览型号CY28372OXCT的Datasheet PDF文件第10页浏览型号CY28372OXCT的Datasheet PDF文件第11页浏览型号CY28372OXCT的Datasheet PDF文件第13页浏览型号CY28372OXCT的Datasheet PDF文件第14页浏览型号CY28372OXCT的Datasheet PDF文件第15页浏览型号CY28372OXCT的Datasheet PDF文件第16页  
CY28372  
Absolute Maximum Conditions  
Parameter  
VDD  
Description  
Core Supply Voltage  
Condition  
Min.  
–0.5  
–0.5  
–0.5  
–65  
0
Max.  
Unit  
V
4.6  
4.6  
VDDA  
VIN  
Analog Supply Voltage  
Input Voltage  
V
Relative to V SS  
VDD + 0.5  
+150  
70  
VDC  
°C  
TS  
Temperature, Storage  
Temperature, Operating Ambient  
Temperature, Junction  
Non-functional  
Functional  
TA  
°C  
TJ  
Functional  
150  
°C  
ESDHBM  
ØJC  
ESD Protection (Human Body Model) MIL-STD-883, Method 3015  
2000  
V
Dissipation, Junction to Case  
Dissipation, Junction to Ambient  
Flammability Rating  
Mil-Spec 883E Method 1012.1  
JEDEC (JESD 51)  
At 1/8 in.  
15  
45  
V–0  
1
°C/W  
°C/W  
ØJA  
UL–94  
MSL  
Moisture Sensitivity Level  
Multiple Supplies: The voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply sequencing is NOT required.  
DC Electrical Specifications  
Parameter  
Description  
Conditions  
Min.  
Max.  
3.465  
5
Unit  
V
VDD, VDDA 3.3 Operating Voltage  
3.3V 5%  
3.135  
CIN  
Input Pin Capacitance  
Output Pin Capacitance  
Pin Inductance  
2
3
pF  
COUT  
LIN  
6
pF  
7
nH  
mA  
mA  
pF  
IDD  
Dynamic Supply Current  
All frequencies at maximum value  
280  
1
IPD  
Power-down Supply Current PD# Asserted  
CXTAL  
Crystal Pin Capacitance  
Measured from the XIN or XOUT pin to  
ground  
30  
42  
VXIH  
VXIL  
XIN High Voltage  
XIN Low Voltage  
0.7VDD  
0
VDD  
V
V
0.3VDD  
AC Electrical Specifications  
Parameter  
Description  
Conditions  
Min.  
Max.  
Unit  
Crystal  
TDC  
XIN Duty Cycle  
The device will operate  
reliably with input duty cycles  
up to30/70but theREFclock  
duty cycle will not be within  
specification  
47.5  
52.5  
%
TPERIOD  
TR / TF  
TCCJ  
XIN Period  
When Xin is driven from an  
external clock source  
69.841  
71.0  
10.0  
500  
ns  
ns  
ps  
XIN Rise and Fall Times  
XIN Cycle to Cycle Jitter  
Measured between 0.3VDD  
and 0.7VDD  
As an average over 1-Ps  
duration  
CPUT0/CPUC0  
TDC  
CPUT0 and CPUC0 Duty Cycle  
100-MHz CPUT and CPUC Period  
133-MHz CPUT and CPUC Period  
Any CPU to CPU Clock Skew  
CPU Cycle to Cycle Jitter  
Measured at crossing point VOX  
45  
9.8  
7.35  
55  
%
ns  
ns  
ps  
ps  
TPERIOD  
TPERIOD  
TSKEW  
TCCJ  
Measured at crossing point VOX  
Measured at crossing point VOX  
Measured at crossing point VOX  
Measured at crossing point VOX  
10.2  
7.65  
150  
150  
Rev 1.0,November 20, 2006  
Page 12 of 17  
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