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CY28349B 参数 Datasheet PDF下载

CY28349B图片预览
型号: CY28349B
PDF下载: 下载PDF文件 查看货源
内容描述: FTG的Intel㈢ Pentium㈢ 4的CPU和芯片组 [FTG for Intel㈢ Pentium㈢ 4 CPU and Chipsets]
分类和应用:
文件页数/大小: 20 页 / 222 K
品牌: SPECTRALINEAR [ SPECTRALINEAR INC ]
 浏览型号CY28349B的Datasheet PDF文件第6页浏览型号CY28349B的Datasheet PDF文件第7页浏览型号CY28349B的Datasheet PDF文件第8页浏览型号CY28349B的Datasheet PDF文件第9页浏览型号CY28349B的Datasheet PDF文件第11页浏览型号CY28349B的Datasheet PDF文件第12页浏览型号CY28349B的Datasheet PDF文件第13页浏览型号CY28349B的Datasheet PDF文件第14页  
CY28349B  
Data Byte 10 (continued)  
Power On  
Default  
Bit  
Bit 3  
Pin#  
Name  
Pin Description  
PCI_Skew1  
PCI_Skew0  
PCI skew control  
00 = Normal  
01 = –500 ps  
10 = Reserved  
11 = +500 ps  
0
0
Bit 2  
Bit 1  
Bit 0  
3V66_Skew1  
3V66_Skew0  
3V66 skew control  
00 = Normal  
01 = –150 ps  
10 = +150 ps  
11 = +300 ps  
0
0
Data Byte 11  
Power On  
Default  
Bit  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
Pin#  
Name  
Pin Description  
ROCV_FREQ_N7  
ROCV_FREQ_N6  
ROCV_FREQ_N5  
ROCV_FREQ_N4  
ROCV_FREQ_N3  
ROCV_FREQ_N2  
ROCV_FREQ_N1  
ROCV_FREQ_N0  
If ROCV_FREQ_SEL is set, the values programmed in  
ROCV_FREQ_N[7:0] and ROCV_FREQ_M[6:0] will be  
used to determine the recovery CPU output frequency  
when a Watchdog Timer time-out occurs.  
The setting of FS_Override bit determines the frequency  
ratio for CPU and other output clocks. When FS_Override  
bit is cleared, the same frequency ratio stated in the  
Latched FS[4:0] register will be used. When it is set, the  
frequency ratio stated in the SEL[4:0] register will be used.  
0
0
0
0
0
0
0
0
Data Byte 12  
Power On  
Default  
Bit  
Pin#  
Name  
Pin Description  
Bit 7  
ROCV_FREQ_SEL  
ROCV_FREQ_SEL determines the source of the recover  
frequency when a Watchdog Timer time-out occurs. The  
clock generator will automatically switch to the recovery  
CPU frequency based on the selection on  
ROCV_FREQ_SEL.  
0
0 = From latched FS[4:0]  
1 = From the settings of ROCV_FREQ_N[7:0] &  
ROCV_FREQ_M[6:0]  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
ROCV_FREQ_M6  
ROCV_FREQ_M5  
ROCV_FREQ_M4  
ROCV_FREQ_M3  
ROCV_FREQ_M2  
ROCV_FREQ_M1  
ROCV_FREQ_M0  
If ROCV_FREQ_SEL is set, the values programmed in  
ROCV_FREQ_N[7:0] and ROCV_FREQ_M[6:0] will be  
used to determine the recovery CPU output  
frequency.when a Watchdog Timer time-out occurs.  
The setting of FS_Override bit determines the frequency  
ratio for CPU and other output clocks. When FS_Override  
bit is cleared, the same frequency ratio stated in the  
Latched FS[4:0] register will be used. When it is set, the  
frequency ratio stated in the SEL[4:0] register will be used.  
0
0
0
0
0
0
0
Rev 1.0,November 20, 2006  
Page 10 of 20  
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