CY28325-3
Data Byte 15
Power-on
Default
Bit
2
Pin#
Name
Pin Description
–
–
–
Reserved
Reserved
0
1
1
1
Vendor Test Mode
Vendor Test Mode
Reserved. Set = 1
Reserved. Set = 1
0
Data Byte 16
Power-on
Default
Bit
7
Pin#
Name
Reserved
Pin Description
–
–
–
–
–
–
–
–
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
0
0
0
0
0
0
0
0
6
Reserved
5
Reserved
4
Reserved
3
Reserved
2
Reserved
1
Reserved
0
Reserved
Data Byte 17
Power-on
Default
Bit
7
Pin#
Name
Reserved
Pin Description
–
–
–
–
–
–
–
–
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
0
0
0
0
0
0
0
0
6
Reserved
5
Reserved
4
Reserved
3
Reserved
2
Reserved
1
Reserved
0
Reserved
The Watchdog Timer and Recovery Output Frequency
features allow users to implement a recovery mechanism
when the system hangs or getting unstable. System BIOS or
other control software can enable the Watchdog timer before
they attempt to make a frequency change. If the system hangs
and a Watchdog timer time-out occurs, a system reset will be
generated and a recovery frequency will be activated. All the
related registers are summarized in the following table.
Programmable Output Frequency, Watchdog Timer and
Recovery Output Frequency Functional Description
The Programmable Output Frequency feature allows users to
generate any CPU output frequency from the range of 50 MHz
to 248 MHz. Cypress offers the most dynamic and the simplest
programming interface for system developers to utilize this
feature in their platforms.
Table 5. Register Summary .
Name
Description
Pro_Freq_EN
Programmable output frequencies enabled
0 = Disabled (default).
1 = Enabled.
When it is disabled, the operating output frequency will be determined by either the latched value of
FS[4:0] inputs or the programmed value of SEL[4:0]. If FS_Override bit is clear, latched FS[4:0] inputs
will be used. If FS_Override bit is set, programmed value of SEL[4:0] will be used. When it is enabled,
the CPU output frequency will be determined by the programmed value of CPUFSEL_N, CPUFSEL_M
andthe PLL GearConstant. The program value of FS_Override, SEL[4:0] orthe latched value ofFS[4:0]
will determine the PLL Gear Constant and the frequency ratio between CPU and other frequency
outputs.
Rev 1.0,November 21, 2006
Page 12 of 18
SPECTRALINEAR [ SPECTRALINEAR INC ]
