CY28325-3
Data Byte 12
Power-on
Default
Bit
Pin#
Name
Pin Description
7
–
ROCV_FREQ_SEL ROCV_FREQ_SEL determines the source of the recover frequency when a
Watchdog tImer time-out occurs. The clock generator will automatically
switch to the recovery CPU frequency based on the selection on
ROCV_FREQ_SEL.
0
0 = From latched FS[4:0]
1 = From the settings of ROCV_FREQ_N[7:0] & ROCV_FREQ_M[6:0]
6
5
4
3
2
1
0
–
–
–
–
–
–
–
ROCV_FREQ_M6
ROCV_FREQ_M5
ROCV_FREQ_M4
ROCV_FREQ_M3
ROCV_FREQ_M2
ROCV_FREQ_M1
ROCV_FREQ_M0
If ROCV_FREQ_SEL is set, the values programmed in
0
0
0
0
0
0
0
ROCV_FREQ_N[7:0] and ROCV_FREQ_M[6:0] will be use to determine the
recovery CPU output frequency when a Watchdog Timer time-out occurs.
The setting of the FS_Override bit determines the frequency ratio for CPU
and other output clocks. When FS_Override bit is cleared, the same
frequency ratio stated in the Latched FS[4:0] register will be used. When it
is set, the frequency ratio stated in the SEL[4:0] register will be used.
Data Byte 13
Power-on
Default
Bit
7
Pin#
Name
Pin Description
–
–
–
–
–
–
–
–
CPU_FSEL_N7
CPU_FSEL_N6
CPU_FSEL_N5
CPU_FSEL_N4
CPU_FSEL_N3
CPU_FSEL_N2
CPU_FSEL_N1
CPU_FSEL_N0
If Prog_Freq_EN is set, the values programmed in CPU_FSEL_N[7:0] and
CPU_FSEL_M[6:0] will be used to determine the CPU output frequency. The
new frequency will start to load whenever CPU_FSELM[6:0] is updated.
The setting of the FS_Override bit determines the frequency ratio for CPU and
other output clocks. When it is cleared, the same frequency ratio stated in the
Latched FS[4:0] register will be used. When it is set, the frequency ratio stated
in the SEL[4:0] register will be used.
0
0
0
0
0
0
0
0
6
5
4
3
2
1
0
Data Byte 14
Power-on
Default
Bit
Pin#
Name
Pro_Freq_EN
Pin Description
7
–
Programmable output frequencies enabled
0 = Disabled
1 = Enabled
0
6
5
4
3
2
1
0
–
–
–
–
–
–
–
CPU_FSEL_M6
CPU_FSEL_M5
CPU_FSEL_M4
CPU_FSEL_M3
CPU_FSEL_M2
CPU_FSEL_M1
CPU_FSEL_M0
If Prog_Freq_EN is set, the values programmed in
CPU_FSEL_N[7:0] and CPU_FSEL_M[6:0] will be used to
determine the CPU output frequency. The new frequency
will start to load whenever CPU_FSELM[6:0] is updated.
The setting of FS_Override bit determines the frequency
ratio for CPU and other output clocks. When it is cleared,
the same frequency ratio stated in the Latched FS[4:0]
register will be used. When it is set, the frequency ratio
stated in the SEL[4:0] register will be used.
0
0
0
0
0
0
0
Data Byte 15
Power-on
Default
Bit
7
Pin#
1
Name
Pin Description
Latched FS4 input
Latched FS3 input
Latched FS2 input
Latched FS1 input
Latched FS0 input
Latched FS[4:0] inputs. These bits are Read-only.
X
X
X
X
X
6
7
5
8
4
11
10
3
Rev 1.0,November 21, 2006
Page 11 of 18
SPECTRALINEAR [ SPECTRALINEAR INC ]
