CY28316
Absolute Maximum Ratings[2.]
Stresses greater than those listed in this table may cause
permanent damage to the device. These represent a stress
rating only. Operation of the device at these or any other condi-
tions above those specified in the operating sections of this
specification is not implied. Maximum conditions for extended
periods may affect reliability.
Parameter
DD, VIN
TSTG
TB
Description
Voltage on any pin with respect to GND
Storage Temperature
Rating
–0.5 to +7.0
–65 to +150
–55 to +125
0 to +70
Unit
V
V
°C
°C
°C
kV
Ambient Temperature under Bias
Operating Temperature
TA
ESDPROT
Input ESD Protection
2 (min.)
DC Electrical Characteristics: TA = 0°C to +70°C, VDDQ3 = 3.3V 5%[3]
Parameter
Description
Test Condition
Min.
Typ.
Max.
Unit
Supply Current
IDD
IDD
Logic Inputs
3.3V Supply Current
260
25
mA
mA
2.5V Supply Current
VIL
VIH
IIL
Input Low Voltage
Input High Voltage
Input Low Current[4]
Input High Current[4]
GND – 0.3
2.0
0.8
VDD + 0.3
–25
V
V
µA
µA
IIH
10
Clock Outputs
VOL
VOH
IOL
Output Low Voltage
Output High Voltage
Output Low Current PCI
REF
IOL = 1 mA
50
mV
V
IOH = –1 mA
VOL = 1.5V
3.1
70
50
50
50
70
70
50
50
50
70
110
70
135
100
100
100
135
135
100
100
100
135
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
V
OL = 1.5V
48 MHz
VOL = 1.5V
70
24 MHz
SDRAM
V
V
OL = 1.5V
OL = 1.5V
70
110
110
70
IOH
Output High Current PCI
VOH = 1.5V
REF
V
V
V
V
OH = 1.5V
OH = 1.5V
OH = 1.5V
OH = 1.5V
48 MHz
24 MHz
SDRAM
70
70
110
Crystal Oscillator
VTH
X1 Input Threshold Voltage[5]
VDDQ3 = 3.3V
1.65
18
V
CLOAD
Load Capacitance, Imposed on External
Crystal[6]
pF
CIN,X1
X1 Input Capacitance[7]
Pin X2 unconnected
Except X1 and X2
TBD
pF
Pin Capacitance/Inductance
CIN Input Pin Capacitance
5
6
7
pF
pF
nH
COUT
Output Pin Capacitance
Input Pin Inductance
LIN
Notes:
2. Multiple Supplies: The voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply sequencing is NOT required.
3. All clock outputs loaded with 6" 60: transmission lines with 20-pF capacitors.
4. CY28316 logic inputs (except FS3) have internal pull-up devices (pull-ups not full CMOS level). Logic input FS3 has an internal pull-down device.
5. X1 input threshold voltage (typical) is V /2.
DD
6. The CY28316 contains an internal crystal load capacitor between pin X1 and ground and another between pin X2 and ground. The total load placed on the crystal
is 18 pF; this includes typical stray capacitance of short PCB traces to the crystal.
7. X1 input capacitance is applicable when driving X1 with an external clock source (X2 is left unconnected).
Rev 1.0,November 20, 2006
Page 13 of 17
SPECTRALINEAR [ SPECTRALINEAR INC ]
