D a t a S h e e t ( P r e l i m i n a r y )
6.18 Multiplane Copy Back Program — S34ML02G1 and S34ML04G1
Figure 6.20 Multiplane Copy Back Program
tR
tR
R/B#
I/Ox
35h
35h
00h
00h
Add. (5 cycles)
Add. (5 cycles)
Col. Add. 1, 2 and Row Add. 1, 2, 3
Source Address on Plane 0
Col. Add. 1, 2 and Row Add. 1, 2, 3
Source Address on Plane 1
1
tDBSY
tPROG
R/B#
I/Ox
85h
Add. (5 cycles)
81h
Add. (5 cycles)
10h
11h
70h
Note 3
Col. Add. 1, 2 and Row Add. 1, 2, 3
Destination Address
Col. Add. 1, 2 and Row Add. 1, 2, 3
Destination Address
1
A0 ~ A11 : Fixed ‘Low’
A12 ~ A17 : Fixed ‘Low’
A0 ~ A11 : Fixed ‘Low’
A12 ~ A17 : Valid
A18
: Fixed ‘Low’
A18
: Fixed ‘High’
A19 ~ A28 : Fixed ‘Low’
A19 ~ A28 : Valid
Plane 0
Plane 1
Source Page
Source Page
Target Page
(1) : Copy Back Read on Plane 0
(2) : Copy Back Read on Plane 1
(3) : Multiplane Copy Back Program
Target Page
(1)
(2)
(3)
(3)
Data Field
Data Field
Spare Field
Spare Field
Notes:
1. Copy Back Program operation is allowed only within the same memory plane.
2. Any command between 11h and 81h is prohibited except 70h, 78h, and FFh.
52
Spansion® SLC NAND Flash Memory for Embedded
S34ML01G1_04G1_10 September 6, 2012