D a t a S h e e t ( P r e l i m i n a r y )
11.7.2
Hardware Reset (RESET#)
Table 11.4 Hardware Reset (RESET#)
Parameter
JEDEC
Std.
Description
Speed
Unit
RESET# Pin Low (During Embedded Algorithms) to
Read Mode or Write mode
tReady
Min
Min
35
µs
RESET# Pin Low (NOT During Embedded Algorithms)
to Read Mode or Write mode
tReady
35
µs
tRP
tRH
tRPD
tRB
RESET# Pulse Width
Min
Min
Min
Min
35
200
10
0
µs
ns
µs
ns
Reset High Time Before Read
RESET# Low to Standby Mode
RY/BY# Recovery Time
Figure 11.7 Reset Timings
RY/BY#
CE#, OE#
RESET#
tRH
tRP
tReady
Reset Timings NOT during Embedded Algorithms
Reset Timings during Embedded Algorithms
tReady
RY/BY#
tRB
CE#, OE#
RESET#
tRP
58
S29GL-P MirrorBit® Flash Family
S29GL-P_00_A7 November 8, 2007
SPANSION [ SPANSION ]
