D a t a S h e e t ( P r e l i m i n a r y )
Figure 11.9 Program Operation Timings
Program Command Sequence (last two cycles)
Read Status Data (last two cycles)
tAS
PA
tWC
Addresses
555h
PA
PA
tAH
CE#
OE#
tCH
tWHWH1
tWP
WE#
tWPH
tCS
tDS
tDH
PD
DOUT
A0h
Status
Data
tBUSY
tRB
RY/BY#
VCC
tVCS
Notes
1. PA = program address, PD = program data, D
is the true data at the program address.
OUT
2. Illustration shows device in word mode.
Figure 11.10 Accelerated Program Timing Diagram
VHH
VIL or VIH
VIL or VIH
ACC
tVHH
tVHH
Notes
1. Not 100% tested.
2. CE#, OE# = V
IL
3. OE# = V
IL
4. See Figure 11.3 and Table 11.1 for test specifications.
November 8, 2007 S29GL-P_00_A7
S29GL-P MirrorBit® Flash Family
61