D a t a S h e e t
15. AC Characteristics
Table 15.1 Read-Only Operations
Parameter
Speed Options
JEDEC
tAVAV
Std.
Description
Read Cycle Time (Note 1)
Test Setup
90
90
90
90
25
—
25
—
110
110
110
110
25
Unit
ns
tRC
Min
Max
Max
tAVQV
tELQV
tACC Address to Output Delay
tCE Chip Enable to Output Delay
CE#, OE# = VIL
OE# = VIL
ns
ns
V
IO = VCC = 3 V
VIO = 1.8 V, VCC = 3 V
IO = VCC = 3 V
VIO = 1.8 V, VCC = 3 V
tPACC Page Access Time
Max
Max
ns
ns
30
V
25
tGLQV
tOE
Output Enable to Output Delay
30
tEHQZ
tGHQZ
tDF
tDF
Chip Enable to Output High Z (Note 1)
Output Enable to Output High Z (Note 1)
Max
Max
20
20
ns
ns
Output Hold Time From Addresses, CE# or OE#,
Whichever Occurs First
tAXQX
tOH
Min
Min
Min
0
0
ns
ns
ns
Read
Output Enable Hold
Time
tOEH
Toggle and
10
(Note 1)
Data# Polling
Notes
1. Not 100% tested.
2. See Figure 14.1 on page 63 and Table 14.1 on page 63 for test specifications.
Figure 15.1 VCC Power-up Diagram
tVCS
CC min
VCC
V
VIH
RESET#
t
RH
CE#
64
S29GL-N MirrorBit® Flash Family
S29GL-N_01_09 November 16, 2007
SPANSION [ SPANSION ]
