D a t a S h e e t
14. Test Conditions
Figure 14.1 Test Setup
3.3 V
2.7 kΩ
Device
Under
Test
C
L
6.2 kΩ
Note
Diodes are IN3064 or equivalent.
Table 14.1 Test Specifications
Test Condition
All Speeds
1 TTL gate
Unit
Output Load
Output Load Capacitance, C
(including jig capacitance)
L
30
pF
Input Rise and Fall Times
Input Pulse Levels
5
ns
V
0.0 or V
IO
Input timing measurement reference levels
Output timing measurement reference levels
0.5 V
0.5 V
V
IO
IO
V
14.1 Key to Switching Waveforms
Waveform
Inputs
Outputs
Steady
Changing from H to L
Changing from L to H
Don’t Care, Any Change Permitted
Changing, State Unknown
Does Not Apply
Center Line is High Impedance State (High Z)
Figure 14.2 Input Waveforms and Measurement Levels
V
CC
0.5 VIO
Input
0.5 VIO
Measurement Level
Output
0.0 V
November 16, 2007 S29GL-N_01_09
S29GL-N MirrorBit® Flash Family
63
SPANSION [ SPANSION ]
