D a t a S h e e t
Table 10.4 Sector Protection Commands (x8)
Bus Cycles (Notes 2–5)
1st/8th
Addr Data Addr
2nd/9th
3rd/10th
4th/11th
5th
6th
7th
Command Sequence
(Notes)
Data
Addr
Data Addr Data Addr Data Addr Data Addr Data
Command Set Entry
(Note 5)
3
AAA
AA
555
55
AAA
40
Program (Note 6)
Read (Note 6)
2
1
XXX
00
A0
XXX
Data
Data
Command Set Exit
(Note 7)
2
XXX
AAA
90
XXX
555
00
55
Command Set Entry
(Note 5)
3
2
8
AA
AAA
02
60
Program (Note 8)
XXX
00
A0
PWAx
01
PWDx
PWD1
PWD0
PWD7
25
PWD2
03
PWD3 04 PWD4 05 PWD5 06 PWD6
Read (Note 9)
07
00
00
06
03
00
07
PWD0
PWD7
01
00
PWD1 02 PWD2 03 PWD3 04 PWD4
29
Unlock (Note 10)
11
2
05
PWD5
PWD6
Command Set Exit
(Note 7)
XX
90
XX
00
Command Set Entry
(Note 5)
3
2
2
1
2
AAA
XXX
XXX
SA
AA
A0
555
SA
00
55
00
30
AAA
C0
PPB Program (Note 11)
All PPB Erase
(Notes 11, 12)
80
PPB Status Read
RD(0)
90
Command Set Exit
(Note 7)
XXX
XXX
00
Command Set Entry
(Note 5)
3
2
1
AAA
XXX
AA
A0
555
55
00
AAA
AAA
50
E0
PPB Lock Bit Set
XXX
PPB Lock Bit Status
Read
XXX RD(0)
Command Set Exit
(Note 7)
2
3
XXX
AAA
90
XX
00
55
Command Set Entry
(Note 5)
AA
555
DYB Set
2
2
1
XXX
XXX
SA
A0
A0
SA
SA
00
01
DYB Clear
DYB Status Read
RD(0)
Command Set Exit
(Note 7)
2
XXX
90
XXX
00
Legend
X = Don’t care.
RA = Address of the memory location to be read.
PWA = Password Address. Address bits A1 and A0 are used to select each 16-
bit portion of the 64-bit entity.
PWD = Password Data.
SA = Sector Address. Any address that falls within a specified sector. See
Tables 8.2–8.8 for sector address ranges.
RD(0) = DQ0 protection indicator bit. If protected, DQ0 = 0. If unprotected,
DQ0 = 1.
Notes
1. All values are in hexadecimal.
7. Exit command must be issued to reset the device into read mode; device
may otherwise be placed in an unknown state.
2. Shaded cells indicate read cycles.
8. Entire two bus-cycle sequence must be entered for each portion of the
password.
3. Address and data bits not specified in table, legend, or notes are don’t
cares (each hex digit implies 4 bits of data).
9. Full address range is required for reading password.
4. Writing incorrect address and data values or writing them in the improper
sequence may place the device in an unknown state. The system must
write the reset command to return the device to reading array data.
10. Password may be unlocked or read in any order. Unlocking requires the full
password (all seven cycles).
5. Entry commands are required to enter a specific mode to enable
instructions only available within that mode.
11. ACC must be at V when setting PPB or DYB.
IH
12. “All PPB Erase” command pre-programs all PPBs before erasure to prevent
over-erasure.
6. No unlock or command cycles required when bank is reading array data.
54
S29GL-N MirrorBit® Flash Family
S29GL-N_01_09 November 16, 2007
SPANSION [ SPANSION ]
